target/arm: Rearrange decode in disas_uncond_b_reg
This will enable PAuth decode in a subsequent patch. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190108223129.5570-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1989,32 +1989,54 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
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rn = extract32(insn, 5, 5);
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op4 = extract32(insn, 0, 5);
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if (op4 != 0x0 || op3 != 0x0 || op2 != 0x1f) {
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unallocated_encoding(s);
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return;
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if (op2 != 0x1f) {
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goto do_unallocated;
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}
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switch (opc) {
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case 0: /* BR */
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case 1: /* BLR */
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case 2: /* RET */
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gen_a64_set_pc(s, cpu_reg(s, rn));
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switch (op3) {
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case 0:
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if (op4 != 0) {
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goto do_unallocated;
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}
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dst = cpu_reg(s, rn);
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break;
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default:
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goto do_unallocated;
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}
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gen_a64_set_pc(s, dst);
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/* BLR also needs to load return address */
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if (opc == 1) {
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tcg_gen_movi_i64(cpu_reg(s, 30), s->pc);
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}
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break;
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case 4: /* ERET */
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if (s->current_el == 0) {
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unallocated_encoding(s);
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return;
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goto do_unallocated;
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}
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switch (op3) {
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case 0:
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if (op4 != 0) {
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goto do_unallocated;
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}
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dst = tcg_temp_new_i64();
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tcg_gen_ld_i64(dst, cpu_env,
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offsetof(CPUARMState, elr_el[s->current_el]));
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break;
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default:
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goto do_unallocated;
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}
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_start();
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}
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dst = tcg_temp_new_i64();
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tcg_gen_ld_i64(dst, cpu_env,
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offsetof(CPUARMState, elr_el[s->current_el]));
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gen_helper_exception_return(cpu_env, dst);
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tcg_temp_free_i64(dst);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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@ -2023,14 +2045,17 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
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/* Must exit loop to check un-masked IRQs */
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s->base.is_jmp = DISAS_EXIT;
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return;
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case 5: /* DRPS */
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if (rn != 0x1f) {
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unallocated_encoding(s);
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if (op3 != 0 || op4 != 0 || rn != 0x1f) {
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goto do_unallocated;
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} else {
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unsupported_encoding(s, insn);
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}
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return;
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default:
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do_unallocated:
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unallocated_encoding(s);
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return;
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}
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