Hexagon (target/hexagon) Pass SP explicitly to helpers that need it
Rather than reading SP from the env, pass it explicitly Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Tested-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20240214042726.19290-3-ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <bcain@quicinc.com>
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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* Copyright(c) 2019-2024 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -117,6 +117,7 @@ DEF_ATTRIB(IMPLICIT_READS_P1, "Reads the P1 register", "", "")
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DEF_ATTRIB(IMPLICIT_READS_P2, "Reads the P2 register", "", "")
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DEF_ATTRIB(IMPLICIT_READS_P3, "Reads the P3 register", "", "")
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DEF_ATTRIB(IMPLICIT_WRITES_USR, "May write USR", "", "")
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DEF_ATTRIB(IMPLICIT_READS_SP, "Reads the SP register", "", "")
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DEF_ATTRIB(COMMUTES, "The operation is communitive", "", "")
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DEF_ATTRIB(DEALLOCRET, "dealloc_return", "", "")
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DEF_ATTRIB(DEALLOCFRAME, "deallocframe", "", "")
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@ -101,6 +101,7 @@ def calculate_attribs():
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add_qemu_macro_attrib('fLSBNEW1', 'A_IMPLICIT_READS_P1')
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add_qemu_macro_attrib('fLSBNEW1NOT', 'A_IMPLICIT_READS_P1')
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add_qemu_macro_attrib('fREAD_P3', 'A_IMPLICIT_READS_P3')
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add_qemu_macro_attrib('fREAD_SP', 'A_IMPLICIT_READS_SP')
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# Recurse down macros, find attributes from sub-macros
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macroValues = list(macros.values())
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@ -201,6 +202,10 @@ def need_p0(tag):
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return "A_IMPLICIT_READS_P0" in attribdict[tag]
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def need_sp(tag):
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return "A_IMPLICIT_READS_SP" in attribdict[tag]
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def need_slot(tag):
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if (
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"A_CVI_SCATTER" not in attribdict[tag]
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@ -1144,6 +1149,12 @@ def helper_args(tag, regs, imms):
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"hex_pred[0]",
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"uint32_t P0"
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))
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if need_sp(tag):
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args.append(HelperArg(
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"i32",
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"hex_gpr[HEX_REG_SP]",
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"uint32_t SP"
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))
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if need_slot(tag):
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args.append(HelperArg(
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"i32",
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@ -343,7 +343,7 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift)
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#define fREAD_LR() (env->gpr[HEX_REG_LR])
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#define fREAD_SP() (env->gpr[HEX_REG_SP])
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#define fREAD_SP() (SP)
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#define fREAD_LC0 (env->gpr[HEX_REG_LC0])
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#define fREAD_LC1 (env->gpr[HEX_REG_LC1])
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#define fREAD_SA0 (env->gpr[HEX_REG_SA0])
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