mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

target/s390x: Use tcg_constant_* for DisasCompare

Browse Source 
The a and b fields are not modified by the consumer,
and while we need not free a constant, tcg will quietly
ignore such frees, so free_compare need not be changed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230220184052.163465-3-richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Richard Henderson 2023-02-20 08:40:27 -10:00 committed by Thomas Huth
parent f1ea739bd5
commit f5d7b0e2e0
1 changed files with 22 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
target/s390x/tcg/translate.c
View File

@ -845,7 +845,7 @@ static void disas_jcc(DisasContext *s, DisasCompare *c, uint32_t mask)
c->is_64 = false; c->is_64 = false;
c->u.s32.a = tcg_temp_new_i32(); c->u.s32.a = tcg_temp_new_i32();
tcg_gen_extrl_i64_i32(c->u.s32.a, cc_dst); tcg_gen_extrl_i64_i32(c->u.s32.a, cc_dst);
c->u.s32.b = tcg_const_i32(0); c->u.s32.b = tcg_constant_i32(0);
break; break;
case CC_OP_LTGT_32: case CC_OP_LTGT_32:
case CC_OP_LTUGTU_32: case CC_OP_LTUGTU_32:
@ -860,7 +860,7 @@ static void disas_jcc(DisasContext *s, DisasCompare *c, uint32_t mask)
case CC_OP_NZ: case CC_OP_NZ:
case CC_OP_FLOGR: case CC_OP_FLOGR:
c->u.s64.a = cc_dst; c->u.s64.a = cc_dst;
c->u.s64.b = tcg_const_i64(0); c->u.s64.b = tcg_constant_i64(0);
c->g1 = true; c->g1 = true;
break; break;
case CC_OP_LTGT_64: case CC_OP_LTGT_64:
@ -874,14 +874,14 @@ static void disas_jcc(DisasContext *s, DisasCompare *c, uint32_t mask)
case CC_OP_TM_64: case CC_OP_TM_64:
case CC_OP_ICM: case CC_OP_ICM:
c->u.s64.a = tcg_temp_new_i64(); c->u.s64.a = tcg_temp_new_i64();
c->u.s64.b = tcg_const_i64(0); c->u.s64.b = tcg_constant_i64(0);
tcg_gen_and_i64(c->u.s64.a, cc_src, cc_dst); tcg_gen_and_i64(c->u.s64.a, cc_src, cc_dst);
break; break;
case CC_OP_ADDU: case CC_OP_ADDU:
case CC_OP_SUBU: case CC_OP_SUBU:
c->is_64 = true; c->is_64 = true;
c->u.s64.b = tcg_const_i64(0); c->u.s64.b = tcg_constant_i64(0);
c->g1 = true; c->g1 = true;
switch (mask) { switch (mask) {
case 8 | 2: case 8 | 2:
@ -904,65 +904,65 @@ static void disas_jcc(DisasContext *s, DisasCompare *c, uint32_t mask)
switch (mask) { switch (mask) {
case 0x8 | 0x4 | 0x2: /* cc != 3 */ case 0x8 | 0x4 | 0x2: /* cc != 3 */
cond = TCG_COND_NE; cond = TCG_COND_NE;
c->u.s32.b = tcg_const_i32(3); c->u.s32.b = tcg_constant_i32(3);
break; break;
case 0x8 | 0x4 | 0x1: /* cc != 2 */ case 0x8 | 0x4 | 0x1: /* cc != 2 */
cond = TCG_COND_NE; cond = TCG_COND_NE;
c->u.s32.b = tcg_const_i32(2); c->u.s32.b = tcg_constant_i32(2);
break; break;
case 0x8 | 0x2 | 0x1: /* cc != 1 */ case 0x8 | 0x2 | 0x1: /* cc != 1 */
cond = TCG_COND_NE; cond = TCG_COND_NE;
c->u.s32.b = tcg_const_i32(1); c->u.s32.b = tcg_constant_i32(1);
break; break;
case 0x8 | 0x2: /* cc == 0 || cc == 2 => (cc & 1) == 0 */ case 0x8 | 0x2: /* cc == 0 || cc == 2 => (cc & 1) == 0 */
cond = TCG_COND_EQ; cond = TCG_COND_EQ;
c->g1 = false; c->g1 = false;
c->u.s32.a = tcg_temp_new_i32(); c->u.s32.a = tcg_temp_new_i32();
c->u.s32.b = tcg_const_i32(0); c->u.s32.b = tcg_constant_i32(0);
tcg_gen_andi_i32(c->u.s32.a, cc_op, 1); tcg_gen_andi_i32(c->u.s32.a, cc_op, 1);
break; break;
case 0x8 | 0x4: /* cc < 2 */ case 0x8 | 0x4: /* cc < 2 */
cond = TCG_COND_LTU; cond = TCG_COND_LTU;
c->u.s32.b = tcg_const_i32(2); c->u.s32.b = tcg_constant_i32(2);
break; break;
case 0x8: /* cc == 0 */ case 0x8: /* cc == 0 */
cond = TCG_COND_EQ; cond = TCG_COND_EQ;
c->u.s32.b = tcg_const_i32(0); c->u.s32.b = tcg_constant_i32(0);
break; break;
case 0x4 | 0x2 | 0x1: /* cc != 0 */ case 0x4 | 0x2 | 0x1: /* cc != 0 */
cond = TCG_COND_NE; cond = TCG_COND_NE;
c->u.s32.b = tcg_const_i32(0); c->u.s32.b = tcg_constant_i32(0);
break; break;
case 0x4 | 0x1: /* cc == 1 || cc == 3 => (cc & 1) != 0 */ case 0x4 | 0x1: /* cc == 1 || cc == 3 => (cc & 1) != 0 */
cond = TCG_COND_NE; cond = TCG_COND_NE;
c->g1 = false; c->g1 = false;
c->u.s32.a = tcg_temp_new_i32(); c->u.s32.a = tcg_temp_new_i32();
c->u.s32.b = tcg_const_i32(0); c->u.s32.b = tcg_constant_i32(0);
tcg_gen_andi_i32(c->u.s32.a, cc_op, 1); tcg_gen_andi_i32(c->u.s32.a, cc_op, 1);
break; break;
case 0x4: /* cc == 1 */ case 0x4: /* cc == 1 */
cond = TCG_COND_EQ; cond = TCG_COND_EQ;
c->u.s32.b = tcg_const_i32(1); c->u.s32.b = tcg_constant_i32(1);
break; break;
case 0x2 | 0x1: /* cc > 1 */ case 0x2 | 0x1: /* cc > 1 */
cond = TCG_COND_GTU; cond = TCG_COND_GTU;
c->u.s32.b = tcg_const_i32(1); c->u.s32.b = tcg_constant_i32(1);
break; break;
case 0x2: /* cc == 2 */ case 0x2: /* cc == 2 */
cond = TCG_COND_EQ; cond = TCG_COND_EQ;
c->u.s32.b = tcg_const_i32(2); c->u.s32.b = tcg_constant_i32(2);
break; break;
case 0x1: /* cc == 3 */ case 0x1: /* cc == 3 */
cond = TCG_COND_EQ; cond = TCG_COND_EQ;
c->u.s32.b = tcg_const_i32(3); c->u.s32.b = tcg_constant_i32(3);
break; break;
default: default:
/* CC is masked by something else: (8 >> cc) & mask. */ /* CC is masked by something else: (8 >> cc) & mask. */
cond = TCG_COND_NE; cond = TCG_COND_NE;
c->g1 = false; c->g1 = false;
c->u.s32.a = tcg_const_i32(8); c->u.s32.a = tcg_temp_new_i32();
c->u.s32.b = tcg_const_i32(0); c->u.s32.b = tcg_constant_i32(0);
tcg_gen_shr_i32(c->u.s32.a, c->u.s32.a, cc_op); tcg_gen_shr_i32(c->u.s32.a, tcg_constant_i32(8), cc_op);
tcg_gen_andi_i32(c->u.s32.a, c->u.s32.a, mask); tcg_gen_andi_i32(c->u.s32.a, c->u.s32.a, mask);
break; break;
} }
@ -1619,7 +1619,7 @@ static DisasJumpType op_bct32(DisasContext *s, DisasOps *o)
tcg_gen_subi_i64(t, regs[r1], 1); tcg_gen_subi_i64(t, regs[r1], 1);
store_reg32_i64(r1, t); store_reg32_i64(r1, t);
c.u.s32.a = tcg_temp_new_i32(); c.u.s32.a = tcg_temp_new_i32();
c.u.s32.b = tcg_const_i32(0); c.u.s32.b = tcg_constant_i32(0);
tcg_gen_extrl_i64_i32(c.u.s32.a, t); tcg_gen_extrl_i64_i32(c.u.s32.a, t);
tcg_temp_free_i64(t); tcg_temp_free_i64(t);
@ -1643,7 +1643,7 @@ static DisasJumpType op_bcth(DisasContext *s, DisasOps *o)
tcg_gen_subi_i64(t, t, 1); tcg_gen_subi_i64(t, t, 1);
store_reg32h_i64(r1, t); store_reg32h_i64(r1, t);
c.u.s32.a = tcg_temp_new_i32(); c.u.s32.a = tcg_temp_new_i32();
c.u.s32.b = tcg_const_i32(0); c.u.s32.b = tcg_constant_i32(0);
tcg_gen_extrl_i64_i32(c.u.s32.a, t); tcg_gen_extrl_i64_i32(c.u.s32.a, t);
tcg_temp_free_i64(t); tcg_temp_free_i64(t);
@ -1664,7 +1664,7 @@ static DisasJumpType op_bct64(DisasContext *s, DisasOps *o)
tcg_gen_subi_i64(regs[r1], regs[r1], 1); tcg_gen_subi_i64(regs[r1], regs[r1], 1);
c.u.s64.a = regs[r1]; c.u.s64.a = regs[r1];
c.u.s64.b = tcg_const_i64(0); c.u.s64.b = tcg_constant_i64(0);
return help_branch(s, &c, is_imm, imm, o->in2); return help_branch(s, &c, is_imm, imm, o->in2);
} }