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i.MX: Standardize i.MX AVIC debug

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The goal is to have debug code always compiled during build.

We standardize all debug output on the following format:

[QOM_TYPE_NAME]reporting_function: debug message

We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output
is following the same format as the above debug.

Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: 29885ffea2577eaf2288c1d17fd87ee951748b49.1445781957.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Jean-Christophe Dubois 2015-10-25 15:16:17 +01:00 committed by Peter Maydell
parent 3afcbb01bc
commit f50ed7853a
1 changed files with 18 additions and 26 deletions
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44
hw/intc/imx_avic.c
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@ -17,27 +17,17 @@
#include "hw/intc/imx_avic.h" #include "hw/intc/imx_avic.h"
#define DEBUG_INT 1 #ifndef DEBUG_IMX_AVIC
#undef DEBUG_INT /* comment out for debugging */ #define DEBUG_IMX_AVIC 0
#endif
#ifdef DEBUG_INT
#define DPRINTF(fmt, args...) \ #define DPRINTF(fmt, args...) \
do { printf("%s: " fmt , TYPE_IMX_AVIC, ##args); } while (0) do { \
#else if (DEBUG_IMX_AVIC) { \
#define DPRINTF(fmt, args...) do {} while (0) fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX_AVIC, \
#endif __func__, ##args); \
} \
/* } while (0)
* Define to 1 for messages about attempts to
* access unimplemented registers or similar.
*/
#define DEBUG_IMPLEMENTATION 1
#if DEBUG_IMPLEMENTATION
# define IPRINTF(fmt, args...) \
do { fprintf(stderr, "%s: " fmt, TYPE_IMX_AVIC, ##args); } while (0)
#else
# define IPRINTF(fmt, args...) do {} while (0)
#endif
static const VMStateDescription vmstate_imx_avic = { static const VMStateDescription vmstate_imx_avic = {
.name = TYPE_IMX_AVIC, .name = TYPE_IMX_AVIC,
@ -115,8 +105,8 @@ static uint64_t imx_avic_read(void *opaque,
{ {
IMXAVICState *s = (IMXAVICState *)opaque; IMXAVICState *s = (IMXAVICState *)opaque;
DPRINTF("read(offset = 0x%" HWADDR_PRIx ")\n", offset);
DPRINTF("read(offset = 0x%x)\n", offset >> 2);
switch (offset >> 2) { switch (offset >> 2) {
case 0: /* INTCNTL */ case 0: /* INTCNTL */
return s->intcntl; return s->intcntl;
@ -213,7 +203,8 @@ static uint64_t imx_avic_read(void *opaque,
return 0x4; return 0x4;
default: default:
IPRINTF("%s: Bad offset 0x%x\n", __func__, (int)offset); qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
HWADDR_PRIx "\n", TYPE_IMX_AVIC, __func__, offset);
return 0; return 0;
} }
} }
@ -225,13 +216,13 @@ static void imx_avic_write(void *opaque, hwaddr offset,
/* Vector Registers not yet supported */ /* Vector Registers not yet supported */
if (offset >= 0x100 && offset <= 0x2fc) { if (offset >= 0x100 && offset <= 0x2fc) {
IPRINTF("%s to vector register %d ignored\n", __func__, qemu_log_mask(LOG_UNIMP, "[%s]%s: vector %d ignored\n",
(unsigned int)((offset - 0x100) >> 2)); TYPE_IMX_AVIC, __func__, (int)((offset - 0x100) >> 2));
return; return;
} }
DPRINTF("%s(0x%x) = %x\n", __func__, DPRINTF("(0x%" HWADDR_PRIx ") = 0x%x\n", offset, (unsigned int)val);
(unsigned int)offset>>2, (unsigned int)val);
switch (offset >> 2) { switch (offset >> 2) {
case 0: /* Interrupt Control Register, INTCNTL */ case 0: /* Interrupt Control Register, INTCNTL */
s->intcntl = val & (ABFEN | NIDIS | FIDIS | NIAD | FIAD | NM); s->intcntl = val & (ABFEN | NIDIS | FIDIS | NIAD | FIAD | NM);
@ -305,7 +296,8 @@ static void imx_avic_write(void *opaque, hwaddr offset,
return; return;
default: default:
IPRINTF("%s: Bad offset %x\n", __func__, (int)offset); qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
HWADDR_PRIx "\n", TYPE_IMX_AVIC, __func__, offset);
} }
imx_avic_update(s); imx_avic_update(s);
} }