target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu
Restrict cpu_exec_interrupt() and its callees to sysemu. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210911165434.531552-23-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -192,11 +192,11 @@ static const struct SysemuCPUOps xtensa_sysemu_ops = {
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static const struct TCGCPUOps xtensa_tcg_ops = {
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.initialize = xtensa_translate_init,
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.cpu_exec_interrupt = xtensa_cpu_exec_interrupt,
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.tlb_fill = xtensa_cpu_tlb_fill,
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.debug_excp_handler = xtensa_breakpoint_handler,
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#ifndef CONFIG_USER_ONLY
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.cpu_exec_interrupt = xtensa_cpu_exec_interrupt,
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.do_interrupt = xtensa_cpu_do_interrupt,
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.do_transaction_failed = xtensa_cpu_do_transaction_failed,
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.do_unaligned_access = xtensa_cpu_do_unaligned_access,
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@ -566,14 +566,14 @@ struct XtensaCPU {
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bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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#ifndef CONFIG_USER_ONLY
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void xtensa_cpu_do_interrupt(CPUState *cpu);
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bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
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#ifndef CONFIG_USER_ONLY
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void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
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unsigned size, MMUAccessType access_type,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr);
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#endif /* !CONFIG_USER_ONLY */
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#endif
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void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
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hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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void xtensa_count_regs(const XtensaConfig *config,
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@ -255,11 +255,6 @@ void xtensa_cpu_do_interrupt(CPUState *cs)
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}
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check_interrupts(env);
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}
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#else
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void xtensa_cpu_do_interrupt(CPUState *cs)
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{
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}
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#endif
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bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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{
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@ -270,3 +265,5 @@ bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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}
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return false;
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}
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#endif /* !CONFIG_USER_ONLY */
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