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target/i386: Introduce cc_op_size

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Replace arithmetic on cc_op with a helper function.
Assert that the op has a size and that it is valid
for the configuration.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Link: https://lore.kernel.org/r/20240701025115.1265117-6-richard.henderson@linaro.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Richard Henderson 2024-07-15 14:34:29 +02:00 committed by Paolo Bonzini
parent ee806f9f67
commit f359b2fb71
3 changed files with 26 additions and 13 deletions
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17
target/i386/cpu.h
View File

@ -24,6 +24,7 @@
#include "cpu-qom.h"
#include "kvm/hyperv-proto.h"
#include "exec/cpu-defs.h"
#include "exec/memop.h"
#include "hw/i386/topology.h"
#include "qapi/qapi-types-common.h"
#include "qemu/cpu-float.h"
@ -1304,7 +1305,9 @@ typedef enum {
CC_OP_ADOX = 2, /* CC_SRC2 = O, CC_SRC = rest. */
CC_OP_ADCOX = 3, /* CC_DST = C, CC_SRC2 = O, CC_SRC = rest. */
CC_OP_MULB, /* modify all flags, C, O = (CC_SRC != 0) */
/* Low 2 bits = MemOp constant for the size */
#define CC_OP_FIRST_BWLQ CC_OP_MULB
CC_OP_MULB = 4, /* modify all flags, C, O = (CC_SRC != 0) */
CC_OP_MULW,
CC_OP_MULL,
CC_OP_MULQ,
@ -1374,6 +1377,7 @@ typedef enum {
CC_OP_POPCNTL__,
CC_OP_POPCNTQ__,
CC_OP_POPCNT = sizeof(target_ulong) == 8 ? CC_OP_POPCNTQ__ : CC_OP_POPCNTL__,
#define CC_OP_LAST_BWLQ CC_OP_POPCNTQ__
CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
CC_OP_NB,
@ -1382,6 +1386,17 @@ typedef enum {
/* See X86DecodedInsn.cc_op, using int8_t. */
QEMU_BUILD_BUG_ON(CC_OP_DYNAMIC > INT8_MAX);
static inline MemOp cc_op_size(CCOp op)
{
MemOp size = op & 3;
QEMU_BUILD_BUG_ON(CC_OP_FIRST_BWLQ & 3);
assert(op >= CC_OP_FIRST_BWLQ && op <= CC_OP_LAST_BWLQ);
assert(size <= MO_TL);
return size;
}
typedef struct SegmentCache {
uint32_t selector;
target_ulong base;

5
target/i386/tcg/emit.c.inc
View File

@ -1466,7 +1466,7 @@ static void gen_bt_flags(DisasContext *s, X86DecodedInsn *decode, TCGv src, TCGv
*/
decode->cc_src = tcg_temp_new();
decode->cc_dst = cpu_cc_dst;
decode->cc_op = ((s->cc_op - CC_OP_MULB) & 3) + CC_OP_SARB;
decode->cc_op = CC_OP_SARB + cc_op_size(s->cc_op);
tcg_gen_shr_tl(decode->cc_src, src, s->T1);
}
}
@ -3346,7 +3346,8 @@ static bool gen_eflags_adcox(DisasContext *s, X86DecodedInsn *decode, bool want_
* bit, we might as well fish CF out of EFLAGS and save a shift.
*/
if (want_carry && (!need_flags || s->cc_op == CC_OP_SHLB + MO_TL)) {
tcg_gen_shri_tl(decode->cc_dst, cpu_cc_src, (8 << (s->cc_op - CC_OP_SHLB)) - 1);
MemOp size = cc_op_size(s->cc_op);
tcg_gen_shri_tl(decode->cc_dst, cpu_cc_src, (8 << size) - 1);
got_cf = true;
}
gen_mov_eflags(s, decode->cc_src);

17
target/i386/tcg/translate.c
View File

@ -885,7 +885,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
case CC_OP_ADDB ... CC_OP_ADDQ:
/* (DATA_TYPE)CC_DST < (DATA_TYPE)CC_SRC */
size = s->cc_op - CC_OP_ADDB;
size = cc_op_size(s->cc_op);
tcg_gen_ext_tl(cpu_cc_dst, cpu_cc_dst, size);
tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size);
return (CCPrepare) { .cond = TCG_COND_LTU, .reg = cpu_cc_dst,
@ -902,7 +902,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
case CC_OP_SHLB ... CC_OP_SHLQ:
/* (CC_SRC >> (DATA_BITS - 1)) & 1 */
size = s->cc_op - CC_OP_SHLB;
size = cc_op_size(s->cc_op);
return gen_prepare_sign_nz(cpu_cc_src, size);
case CC_OP_MULB ... CC_OP_MULQ:
@ -910,11 +910,11 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
.reg = cpu_cc_src };
case CC_OP_BMILGB ... CC_OP_BMILGQ:
size = s->cc_op - CC_OP_BMILGB;
size = cc_op_size(s->cc_op);
return gen_prepare_val_nz(cpu_cc_src, size, true);
case CC_OP_BLSIB ... CC_OP_BLSIQ:
size = s->cc_op - CC_OP_BLSIB;
size = cc_op_size(s->cc_op);
return gen_prepare_val_nz(cpu_cc_src, size, false);
case CC_OP_ADCX:
@ -966,10 +966,7 @@ static CCPrepare gen_prepare_eflags_s(DisasContext *s, TCGv reg)
case CC_OP_POPCNT:
return (CCPrepare) { .cond = TCG_COND_NEVER };
default:
{
MemOp size = (s->cc_op - CC_OP_ADDB) & 3;
return gen_prepare_sign_nz(cpu_cc_dst, size);
}
return gen_prepare_sign_nz(cpu_cc_dst, cc_op_size(s->cc_op));
}
}
@ -1007,7 +1004,7 @@ static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg)
.imm = CC_Z };
default:
{
MemOp size = (s->cc_op - CC_OP_ADDB) & 3;
MemOp size = cc_op_size(s->cc_op);
return gen_prepare_val_nz(cpu_cc_dst, size, true);
}
}
@ -1028,7 +1025,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
switch (s->cc_op) {
case CC_OP_SUBB ... CC_OP_SUBQ:
/* We optimize relational operators for the cmp/jcc case. */
size = s->cc_op - CC_OP_SUBB;
size = cc_op_size(s->cc_op);
switch (jcc_op) {
case JCC_BE:
tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size);