mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

target/ppc: Move float_check_status from FPU_FCTI to translate

Browse Source 
Fixes a bug in which e.g XE enabled causes inexact to be raised
before the writeback to the architectural register.

All of the users of GEN_FLOAT_B either set set_fprf, or are one
of the convert-to-integer instructions that require this behaviour.
Split out the two gen_helper_* calls in gen_compute_fprf_float64
and protect only the first with set_fprf.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-12-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Richard Henderson 2021-12-17 17:57:14 +01:00 committed by Cédric Le Goater
parent c07f82416c
commit f2e2504676
2 changed files with 5 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
target/ppc/fpu_helper.c
View File

@ -600,12 +600,9 @@ uint64_t helper_##op(CPUPPCState *env, float64 arg) \
uint64_t ret = float64_to_##cvt(arg, &env->fp_status); \
int status = get_float_exception_flags(&env->fp_status); \
\
if (unlikely(status)) { \
if (status & float_flag_invalid) { \
float_invalid_cvt(env, 1, GETPC(), float64_classify(arg)); \
ret = nanval; \
} \
do_float_check_status(env, GETPC()); \
if (unlikely(status & float_flag_invalid)) { \
float_invalid_cvt(env, 1, GETPC(), float64_classify(arg)); \
ret = nanval; \
} \
return ret; \
}

3
target/ppc/translate/fp-impl.c.inc
View File

@ -157,8 +157,9 @@ static void gen_f##name(DisasContext *ctx) \
gen_helper_f##name(t1, cpu_env, t0); \
set_fpr(rD(ctx->opcode), t1); \
if (set_fprf) { \
gen_compute_fprf_float64(t1); \
gen_helper_compute_fprf_float64(cpu_env, t1); \
} \
gen_helper_float_check_status(cpu_env); \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
} \