target/ppc: Introduce a relocation bool in ppc_radix64_handle_mmu_fault()
It will ease the introduction of new routines for partition-scoped Radix translation. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200330094946.24678-3-clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -229,12 +229,13 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
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uint64_t lpid = 0, pid = 0, offset, size, prtbe0, pte;
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uint64_t lpid = 0, pid = 0, offset, size, prtbe0, pte;
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int page_size, prot, fault_cause = 0;
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int page_size, prot, fault_cause = 0;
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ppc_v3_pate_t pate;
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ppc_v3_pate_t pate;
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bool relocation;
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assert((rwx == 0) || (rwx == 1) || (rwx == 2));
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assert((rwx == 0) || (rwx == 1) || (rwx == 2));
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relocation = ((rwx == 2) && (msr_ir == 1)) || ((rwx != 2) && (msr_dr == 1));
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/* HV or virtual hypervisor Real Mode Access */
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/* HV or virtual hypervisor Real Mode Access */
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if ((msr_hv || cpu->vhyp) &&
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if (!relocation && (msr_hv || cpu->vhyp)) {
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(((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0)))) {
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/* In real mode top 4 effective addr bits (mostly) ignored */
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/* In real mode top 4 effective addr bits (mostly) ignored */
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raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL;
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raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL;
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