mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

s390x/tcg: Implement VECTOR LOAD LOGICAL ELEMENT AND ZERO

Browse Source 
Fairly easy, zero out the vector before we load the desired element.
Load the element before touching the vector.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190307121539.12842-13-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
This commit is contained in:
David Hildenbrand 2019-03-07 13:15:19 +01:00 committed by Cornelia Huck
parent 5d203bea59
commit f180da83c0
2 changed files with 48 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
target/s390x/insn-data.def
View File

@ -998,6 +998,8 @@
E(0xe742, VLEIG, VRI_a, V, 0, 0, 0, 0, vlei, 0, ES_64, IF_VEC)
/* VECTOR LOAD GR FROM VR ELEMENT */
F(0xe721, VLGV, VRS_c, V, la2, 0, r1, 0, vlgv, 0, IF_VEC)
/* VECTOR LOAD LOGICAL ELEMENT AND ZERO */
F(0xe704, VLLEZ, VRX, V, la2, 0, 0, 0, vllez, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */

46
target/s390x/translate_vx.inc.c
View File

@ -163,6 +163,11 @@ static void gen_gvec_dupi(uint8_t es, uint8_t reg, uint64_t c)
}
}
static void zero_vec(uint8_t reg)
{
tcg_gen_gvec_dup8i(vec_full_reg_offset(reg), 16, 16, 0);
}
static DisasJumpType op_vge(DisasContext *s, DisasOps *o)
{
const uint8_t es = s->insn->data;
@ -360,3 +365,44 @@ static DisasJumpType op_vlgv(DisasContext *s, DisasOps *o)
return DISAS_NEXT;
}
static DisasJumpType op_vllez(DisasContext *s, DisasOps *o)
{
uint8_t es = get_field(s->fields, m3);
uint8_t enr;
TCGv_i64 t;
switch (es) {
/* rightmost sub-element of leftmost doubleword */
case ES_8:
enr = 7;
break;
case ES_16:
enr = 3;
break;
case ES_32:
enr = 1;
break;
case ES_64:
enr = 0;
break;
/* leftmost sub-element of leftmost doubleword */
case 6:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
es = ES_32;
enr = 0;
break;
}
default:
/* fallthrough */
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
t = tcg_temp_new_i64();
tcg_gen_qemu_ld_i64(t, o->addr1, get_mem_index(s), MO_TE | es);
zero_vec(get_field(s->fields, v1));
write_vec_element_i64(t, get_field(s->fields, v1), enr, es);
tcg_temp_free_i64(t);
return DISAS_NEXT;
}