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x86: avoid AREG0 for condition code helpers

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Add an explicit CPUX86State parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2012-04-29 12:45:34 +00:00
parent d3eb5eaeb5
commit f0967a1add
10 changed files with 179 additions and 169 deletions
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1
target-i386/Makefile.objs
View File

@ -7,7 +7,6 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o
obj-$(CONFIG_LINUX_USER) += ioport-user.o
obj-$(CONFIG_BSD_USER) += ioport-user.o
$(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/svm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)

199
target-i386/cc_helper.c
View File

@ -18,7 +18,6 @@
*/
#include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h"
const uint8_t parity_table[256] = {
@ -76,184 +75,177 @@ const uint8_t parity_table[256] = {
#endif
static int compute_all_eflags(void)
static int compute_all_eflags(CPUX86State *env)
{
return CC_SRC;
}
static int compute_c_eflags(void)
static int compute_c_eflags(CPUX86State *env)
{
return CC_SRC & CC_C;
}
uint32_t helper_cc_compute_all(int op)
uint32_t helper_cc_compute_all(CPUX86State *env, int op)
{
switch (op) {
default: /* should never happen */
return 0;
case CC_OP_EFLAGS:
return compute_all_eflags();
return compute_all_eflags(env);
case CC_OP_MULB:
return compute_all_mulb();
return compute_all_mulb(env);
case CC_OP_MULW:
return compute_all_mulw();
return compute_all_mulw(env);
case CC_OP_MULL:
return compute_all_mull();
return compute_all_mull(env);
case CC_OP_ADDB:
return compute_all_addb();
return compute_all_addb(env);
case CC_OP_ADDW:
return compute_all_addw();
return compute_all_addw(env);
case CC_OP_ADDL:
return compute_all_addl();
return compute_all_addl(env);
case CC_OP_ADCB:
return compute_all_adcb();
return compute_all_adcb(env);
case CC_OP_ADCW:
return compute_all_adcw();
return compute_all_adcw(env);
case CC_OP_ADCL:
return compute_all_adcl();
return compute_all_adcl(env);
case CC_OP_SUBB:
return compute_all_subb();
return compute_all_subb(env);
case CC_OP_SUBW:
return compute_all_subw();
return compute_all_subw(env);
case CC_OP_SUBL:
return compute_all_subl();
return compute_all_subl(env);
case CC_OP_SBBB:
return compute_all_sbbb();
return compute_all_sbbb(env);
case CC_OP_SBBW:
return compute_all_sbbw();
return compute_all_sbbw(env);
case CC_OP_SBBL:
return compute_all_sbbl();
return compute_all_sbbl(env);
case CC_OP_LOGICB:
return compute_all_logicb();
return compute_all_logicb(env);
case CC_OP_LOGICW:
return compute_all_logicw();
return compute_all_logicw(env);
case CC_OP_LOGICL:
return compute_all_logicl();
return compute_all_logicl(env);
case CC_OP_INCB:
return compute_all_incb();
return compute_all_incb(env);
case CC_OP_INCW:
return compute_all_incw();
return compute_all_incw(env);
case CC_OP_INCL:
return compute_all_incl();
return compute_all_incl(env);
case CC_OP_DECB:
return compute_all_decb();
return compute_all_decb(env);
case CC_OP_DECW:
return compute_all_decw();
return compute_all_decw(env);
case CC_OP_DECL:
return compute_all_decl();
return compute_all_decl(env);
case CC_OP_SHLB:
return compute_all_shlb();
return compute_all_shlb(env);
case CC_OP_SHLW:
return compute_all_shlw();
return compute_all_shlw(env);
case CC_OP_SHLL:
return compute_all_shll();
return compute_all_shll(env);
case CC_OP_SARB:
return compute_all_sarb();
return compute_all_sarb(env);
case CC_OP_SARW:
return compute_all_sarw();
return compute_all_sarw(env);
case CC_OP_SARL:
return compute_all_sarl();
return compute_all_sarl(env);
#ifdef TARGET_X86_64
case CC_OP_MULQ:
return compute_all_mulq();
return compute_all_mulq(env);
case CC_OP_ADDQ:
return compute_all_addq();
return compute_all_addq(env);
case CC_OP_ADCQ:
return compute_all_adcq();
return compute_all_adcq(env);
case CC_OP_SUBQ:
return compute_all_subq();
return compute_all_subq(env);
case CC_OP_SBBQ:
return compute_all_sbbq();
return compute_all_sbbq(env);
case CC_OP_LOGICQ:
return compute_all_logicq();
return compute_all_logicq(env);
case CC_OP_INCQ:
return compute_all_incq();
return compute_all_incq(env);
case CC_OP_DECQ:
return compute_all_decq();
return compute_all_decq(env);
case CC_OP_SHLQ:
return compute_all_shlq();
return compute_all_shlq(env);
case CC_OP_SARQ:
return compute_all_sarq();
return compute_all_sarq(env);
#endif
}
}
uint32_t cpu_cc_compute_all(CPUX86State *env1, int op)
uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
{
CPUX86State *saved_env;
uint32_t ret;
saved_env = env;
env = env1;
ret = helper_cc_compute_all(op);
env = saved_env;
return ret;
return helper_cc_compute_all(env, op);
}
uint32_t helper_cc_compute_c(int op)
uint32_t helper_cc_compute_c(CPUX86State *env, int op)
{
switch (op) {
default: /* should never happen */
return 0;
case CC_OP_EFLAGS:
return compute_c_eflags();
return compute_c_eflags(env);
case CC_OP_MULB:
return compute_c_mull();
return compute_c_mull(env);
case CC_OP_MULW:
return compute_c_mull();
return compute_c_mull(env);
case CC_OP_MULL:
return compute_c_mull();
return compute_c_mull(env);
case CC_OP_ADDB:
return compute_c_addb();
return compute_c_addb(env);
case CC_OP_ADDW:
return compute_c_addw();
return compute_c_addw(env);
case CC_OP_ADDL:
return compute_c_addl();
return compute_c_addl(env);
case CC_OP_ADCB:
return compute_c_adcb();
return compute_c_adcb(env);
case CC_OP_ADCW:
return compute_c_adcw();
return compute_c_adcw(env);
case CC_OP_ADCL:
return compute_c_adcl();
return compute_c_adcl(env);
case CC_OP_SUBB:
return compute_c_subb();
return compute_c_subb(env);
case CC_OP_SUBW:
return compute_c_subw();
return compute_c_subw(env);
case CC_OP_SUBL:
return compute_c_subl();
return compute_c_subl(env);
case CC_OP_SBBB:
return compute_c_sbbb();
return compute_c_sbbb(env);
case CC_OP_SBBW:
return compute_c_sbbw();
return compute_c_sbbw(env);
case CC_OP_SBBL:
return compute_c_sbbl();
return compute_c_sbbl(env);
case CC_OP_LOGICB:
return compute_c_logicb();
@ -263,111 +255,112 @@ uint32_t helper_cc_compute_c(int op)
return compute_c_logicl();
case CC_OP_INCB:
return compute_c_incl();
return compute_c_incl(env);
case CC_OP_INCW:
return compute_c_incl();
return compute_c_incl(env);
case CC_OP_INCL:
return compute_c_incl();
return compute_c_incl(env);
case CC_OP_DECB:
return compute_c_incl();
return compute_c_incl(env);
case CC_OP_DECW:
return compute_c_incl();
return compute_c_incl(env);
case CC_OP_DECL:
return compute_c_incl();
return compute_c_incl(env);
case CC_OP_SHLB:
return compute_c_shlb();
return compute_c_shlb(env);
case CC_OP_SHLW:
return compute_c_shlw();
return compute_c_shlw(env);
case CC_OP_SHLL:
return compute_c_shll();
return compute_c_shll(env);
case CC_OP_SARB:
return compute_c_sarl();
return compute_c_sarl(env);
case CC_OP_SARW:
return compute_c_sarl();
return compute_c_sarl(env);
case CC_OP_SARL:
return compute_c_sarl();
return compute_c_sarl(env);
#ifdef TARGET_X86_64
case CC_OP_MULQ:
return compute_c_mull();
return compute_c_mull(env);
case CC_OP_ADDQ:
return compute_c_addq();
return compute_c_addq(env);
case CC_OP_ADCQ:
return compute_c_adcq();
return compute_c_adcq(env);
case CC_OP_SUBQ:
return compute_c_subq();
return compute_c_subq(env);
case CC_OP_SBBQ:
return compute_c_sbbq();
return compute_c_sbbq(env);
case CC_OP_LOGICQ:
return compute_c_logicq();
case CC_OP_INCQ:
return compute_c_incl();
return compute_c_incl(env);
case CC_OP_DECQ:
return compute_c_incl();
return compute_c_incl(env);
case CC_OP_SHLQ:
return compute_c_shlq();
return compute_c_shlq(env);
case CC_OP_SARQ:
return compute_c_sarl();
return compute_c_sarl(env);
#endif
}
}
void helper_write_eflags(target_ulong t0, uint32_t update_mask)
void helper_write_eflags(CPUX86State *env, target_ulong t0,
uint32_t update_mask)
{
cpu_load_eflags(env, t0, update_mask);
}
target_ulong helper_read_eflags(void)
target_ulong helper_read_eflags(CPUX86State *env)
{
uint32_t eflags;
eflags = helper_cc_compute_all(CC_OP);
eflags = helper_cc_compute_all(env, CC_OP);
eflags |= (DF & DF_MASK);
eflags |= env->eflags & ~(VM_MASK | RF_MASK);
return eflags;
}
void helper_clts(void)
void helper_clts(CPUX86State *env)
{
env->cr[0] &= ~CR0_TS_MASK;
env->hflags &= ~HF_TS_MASK;
}
void helper_reset_rf(void)
void helper_reset_rf(CPUX86State *env)
{
env->eflags &= ~RF_MASK;
}
void helper_cli(void)
void helper_cli(CPUX86State *env)
{
env->eflags &= ~IF_MASK;
}
void helper_sti(void)
void helper_sti(CPUX86State *env)
{
env->eflags |= IF_MASK;
}
#if 0
/* vm86plus instructions */
void helper_cli_vm(void)
void helper_cli_vm(CPUX86State *env)
{
env->eflags &= ~VIF_MASK;
}
void helper_sti_vm(void)
void helper_sti_vm(CPUX86State *env)
{
env->eflags |= VIF_MASK;
if (env->eflags & VIP_MASK) {
@ -376,12 +369,12 @@ void helper_sti_vm(void)
}
#endif
void helper_set_inhibit_irq(void)
void helper_set_inhibit_irq(CPUX86State *env)
{
env->hflags |= HF_INHIBIT_IRQ_MASK;
}
void helper_reset_inhibit_irq(void)
void helper_reset_inhibit_irq(CPUX86State *env)
{
env->hflags &= ~HF_INHIBIT_IRQ_MASK;
}

36
target-i386/cc_helper_template.h
View File

@ -42,7 +42,7 @@
/* dynamic flags computation */
static int glue(compute_all_add, SUFFIX)(void)
static int glue(compute_all_add, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
target_long src1, src2;
@ -58,7 +58,7 @@ static int glue(compute_all_add, SUFFIX)(void)
return cf | pf | af | zf | sf | of;
}
static int glue(compute_c_add, SUFFIX)(void)
static int glue(compute_c_add, SUFFIX)(CPUX86State *env)
{
int cf;
target_long src1;
@ -68,7 +68,7 @@ static int glue(compute_c_add, SUFFIX)(void)
return cf;
}
static int glue(compute_all_adc, SUFFIX)(void)
static int glue(compute_all_adc, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
target_long src1, src2;
@ -84,7 +84,7 @@ static int glue(compute_all_adc, SUFFIX)(void)
return cf | pf | af | zf | sf | of;
}
static int glue(compute_c_adc, SUFFIX)(void)
static int glue(compute_c_adc, SUFFIX)(CPUX86State *env)
{
int cf;
target_long src1;
@ -94,7 +94,7 @@ static int glue(compute_c_adc, SUFFIX)(void)
return cf;
}
static int glue(compute_all_sub, SUFFIX)(void)
static int glue(compute_all_sub, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
target_long src1, src2;
@ -110,7 +110,7 @@ static int glue(compute_all_sub, SUFFIX)(void)
return cf | pf | af | zf | sf | of;
}
static int glue(compute_c_sub, SUFFIX)(void)
static int glue(compute_c_sub, SUFFIX)(CPUX86State *env)
{
int cf;
target_long src1, src2;
@ -121,7 +121,7 @@ static int glue(compute_c_sub, SUFFIX)(void)
return cf;
}
static int glue(compute_all_sbb, SUFFIX)(void)
static int glue(compute_all_sbb, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
target_long src1, src2;
@ -137,7 +137,7 @@ static int glue(compute_all_sbb, SUFFIX)(void)
return cf | pf | af | zf | sf | of;
}
static int glue(compute_c_sbb, SUFFIX)(void)
static int glue(compute_c_sbb, SUFFIX)(CPUX86State *env)
{
int cf;
target_long src1, src2;
@ -148,7 +148,7 @@ static int glue(compute_c_sbb, SUFFIX)(void)
return cf;
}
static int glue(compute_all_logic, SUFFIX)(void)
static int glue(compute_all_logic, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
@ -166,7 +166,7 @@ static int glue(compute_c_logic, SUFFIX)(void)
return 0;
}
static int glue(compute_all_inc, SUFFIX)(void)
static int glue(compute_all_inc, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
target_long src1, src2;
@ -183,13 +183,13 @@ static int glue(compute_all_inc, SUFFIX)(void)
}
#if DATA_BITS == 32
static int glue(compute_c_inc, SUFFIX)(void)
static int glue(compute_c_inc, SUFFIX)(CPUX86State *env)
{
return CC_SRC;
}
#endif
static int glue(compute_all_dec, SUFFIX)(void)
static int glue(compute_all_dec, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
target_long src1, src2;
@ -205,7 +205,7 @@ static int glue(compute_all_dec, SUFFIX)(void)
return cf | pf | af | zf | sf | of;
}
static int glue(compute_all_shl, SUFFIX)(void)
static int glue(compute_all_shl, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
@ -219,19 +219,19 @@ static int glue(compute_all_shl, SUFFIX)(void)
return cf | pf | af | zf | sf | of;
}
static int glue(compute_c_shl, SUFFIX)(void)
static int glue(compute_c_shl, SUFFIX)(CPUX86State *env)
{
return (CC_SRC >> (DATA_BITS - 1)) & CC_C;
}
#if DATA_BITS == 32
static int glue(compute_c_sar, SUFFIX)(void)
static int glue(compute_c_sar, SUFFIX)(CPUX86State *env)
{
return CC_SRC & 1;
}
#endif
static int glue(compute_all_sar, SUFFIX)(void)
static int glue(compute_all_sar, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;
@ -246,7 +246,7 @@ static int glue(compute_all_sar, SUFFIX)(void)
}
#if DATA_BITS == 32
static int glue(compute_c_mul, SUFFIX)(void)
static int glue(compute_c_mul, SUFFIX)(CPUX86State *env)
{
int cf;
@ -257,7 +257,7 @@ static int glue(compute_c_mul, SUFFIX)(void)
/* NOTE: we compute the flags like the P4. On olders CPUs, only OF and
CF are modified and it is slower to do that. */
static int glue(compute_all_mul, SUFFIX)(void)
static int glue(compute_all_mul, SUFFIX)(CPUX86State *env)
{
int cf, pf, af, zf, sf, of;

20
target-i386/helper.h
View File

@ -1,12 +1,12 @@
#include "def-helper.h"
DEF_HELPER_FLAGS_1(cc_compute_all, TCG_CALL_PURE, i32, int)
DEF_HELPER_FLAGS_1(cc_compute_c, TCG_CALL_PURE, i32, int)
DEF_HELPER_FLAGS_2(cc_compute_all, TCG_CALL_PURE, i32, env, int)
DEF_HELPER_FLAGS_2(cc_compute_c, TCG_CALL_PURE, i32, env, int)
DEF_HELPER_0(lock, void)
DEF_HELPER_0(unlock, void)
DEF_HELPER_2(write_eflags, void, tl, i32)
DEF_HELPER_0(read_eflags, tl)
DEF_HELPER_3(write_eflags, void, env, tl, i32)
DEF_HELPER_1(read_eflags, tl, env)
DEF_HELPER_1(divb_AL, void, tl)
DEF_HELPER_1(idivb_AL, void, tl)
DEF_HELPER_1(divw_AX, void, tl)
@ -44,7 +44,7 @@ DEF_HELPER_2(lret_protected, void, int, int)
DEF_HELPER_1(read_crN, tl, int)
DEF_HELPER_2(write_crN, void, int, tl)
DEF_HELPER_1(lmsw, void, tl)
DEF_HELPER_0(clts, void)
DEF_HELPER_1(clts, void, env)
DEF_HELPER_2(movl_drN_T0, void, int, tl)
DEF_HELPER_1(invlpg, void, tl)
@ -62,13 +62,13 @@ DEF_HELPER_1(hlt, void, int)
DEF_HELPER_1(monitor, void, tl)
DEF_HELPER_1(mwait, void, int)
DEF_HELPER_0(debug, void)
DEF_HELPER_0(reset_rf, void)
DEF_HELPER_1(reset_rf, void, env)
DEF_HELPER_3(raise_interrupt, void, env, int, int)
DEF_HELPER_2(raise_exception, void, env, int)
DEF_HELPER_0(cli, void)
DEF_HELPER_0(sti, void)
DEF_HELPER_0(set_inhibit_irq, void)
DEF_HELPER_0(reset_inhibit_irq, void)
DEF_HELPER_1(cli, void, env)
DEF_HELPER_1(sti, void, env)
DEF_HELPER_1(set_inhibit_irq, void, env)
DEF_HELPER_1(reset_inhibit_irq, void, env)
DEF_HELPER_2(boundw, void, tl, int)
DEF_HELPER_2(boundl, void, tl, int)
DEF_HELPER_0(rsm, void)

8
target-i386/int_helper.c
View File

@ -185,7 +185,7 @@ void helper_aaa(void)
int al, ah, af;
int eflags;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
af = eflags & CC_A;
al = EAX & 0xff;
ah = (EAX >> 8) & 0xff;
@ -209,7 +209,7 @@ void helper_aas(void)
int al, ah, af;
int eflags;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
af = eflags & CC_A;
al = EAX & 0xff;
ah = (EAX >> 8) & 0xff;
@ -232,7 +232,7 @@ void helper_daa(void)
int old_al, al, af, cf;
int eflags;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
cf = eflags & CC_C;
af = eflags & CC_A;
old_al = al = EAX & 0xff;
@ -259,7 +259,7 @@ void helper_das(void)
int al, al1, af, cf;
int eflags;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
cf = eflags & CC_C;
af = eflags & CC_A;
al = EAX & 0xff;

4
target-i386/mem_helper.c
View File

@ -44,7 +44,7 @@ void helper_cmpxchg8b(target_ulong a0)
uint64_t d;
int eflags;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
d = ldq(a0);
if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) {
stq(a0, ((uint64_t)ECX << 32) | (uint32_t)EBX);
@ -68,7 +68,7 @@ void helper_cmpxchg16b(target_ulong a0)
if ((a0 & 0xf) != 0) {
raise_exception(env, EXCP0D_GPF);
}
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
d0 = ldq(a0);
d1 = ldq(a0 + 8);
if (d0 == EAX && d1 == EDX) {

2
target-i386/misc_helper.c
View File

@ -102,7 +102,7 @@ void helper_into(int next_eip_addend)
{
int eflags;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
if (eflags & CC_O) {
raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend);
}

8
target-i386/seg_helper.c
View File

@ -2294,7 +2294,7 @@ target_ulong helper_lsl(target_ulong selector1)
int rpl, dpl, cpl, type;
selector = selector1 & 0xffff;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
if ((selector & 0xfffc) == 0) {
goto fail;
}
@ -2341,7 +2341,7 @@ target_ulong helper_lar(target_ulong selector1)
int rpl, dpl, cpl, type;
selector = selector1 & 0xffff;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
if ((selector & 0xfffc) == 0) {
goto fail;
}
@ -2390,7 +2390,7 @@ void helper_verr(target_ulong selector1)
int rpl, dpl, cpl;
selector = selector1 & 0xffff;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
if ((selector & 0xfffc) == 0) {
goto fail;
}
@ -2428,7 +2428,7 @@ void helper_verw(target_ulong selector1)
int rpl, dpl, cpl;
selector = selector1 & 0xffff;
eflags = helper_cc_compute_all(CC_OP);
eflags = cpu_cc_compute_all(env, CC_OP);
if ((selector & 0xfffc) == 0) {
goto fail;
}

4
target-i386/shift_helper_template.h
View File

@ -54,7 +54,7 @@ target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1)
count = rclb_table[count];
#endif
if (count) {
eflags = helper_cc_compute_all(CC_OP);
eflags = helper_cc_compute_all(env, CC_OP);
t0 &= DATA_MASK;
src = t0;
res = (t0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1));
@ -84,7 +84,7 @@ target_ulong glue(helper_rcr, SUFFIX)(target_ulong t0, target_ulong t1)
count = rclb_table[count];
#endif
if (count) {
eflags = helper_cc_compute_all(CC_OP);
eflags = helper_cc_compute_all(env, CC_OP);
t0 &= DATA_MASK;
src = t0;
res = (t0 >> count) |

66
target-i386/translate.c
View File

@ -811,14 +811,14 @@ static void gen_op_update_neg_cc(void)
/* compute eflags.C to reg */
static void gen_compute_eflags_c(TCGv reg)
{
gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_cc_op);
gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_env, cpu_cc_op);
tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
}
/* compute all eflags to cc_src */
static void gen_compute_eflags(TCGv reg)
{
gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_cc_op);
gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_env, cpu_cc_op);
tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
}
@ -2730,10 +2730,10 @@ static void gen_eob(DisasContext *s)
if (s->cc_op != CC_OP_DYNAMIC)
gen_op_set_cc_op(s->cc_op);
if (s->tb->flags & HF_INHIBIT_IRQ_MASK) {
gen_helper_reset_inhibit_irq();
gen_helper_reset_inhibit_irq(cpu_env);
}
if (s->tb->flags & HF_RF_MASK) {
gen_helper_reset_rf();
gen_helper_reset_rf(cpu_env);
}
if (s->singlestep_enabled) {
gen_helper_debug();
@ -5143,7 +5143,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
/* If several instructions disable interrupts, only the
_first_ does it */
if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
gen_helper_set_inhibit_irq();
gen_helper_set_inhibit_irq(cpu_env);
s->tf = 0;
}
if (s->is_jmp) {
@ -5219,7 +5219,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
/* If several instructions disable interrupts, only the
_first_ does it */
if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
gen_helper_set_inhibit_irq();
gen_helper_set_inhibit_irq(cpu_env);
s->tf = 0;
}
if (s->is_jmp) {
@ -6475,7 +6475,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
} else {
if (s->cc_op != CC_OP_DYNAMIC)
gen_op_set_cc_op(s->cc_op);
gen_helper_read_eflags(cpu_T[0]);
gen_helper_read_eflags(cpu_T[0], cpu_env);
gen_push_T0(s);
}
break;
@ -6487,28 +6487,46 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
gen_pop_T0(s);
if (s->cpl == 0) {
if (s->dflag) {
gen_helper_write_eflags(cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK)));
gen_helper_write_eflags(cpu_env, cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK |
ID_MASK | NT_MASK |
IF_MASK |
IOPL_MASK)));
} else {
gen_helper_write_eflags(cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff));
gen_helper_write_eflags(cpu_env, cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK |
ID_MASK | NT_MASK |
IF_MASK | IOPL_MASK)
& 0xffff));
}
} else {
if (s->cpl <= s->iopl) {
if (s->dflag) {
gen_helper_write_eflags(cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK)));
gen_helper_write_eflags(cpu_env, cpu_T[0],
tcg_const_i32((TF_MASK |
AC_MASK |
ID_MASK |
NT_MASK |
IF_MASK)));
} else {
gen_helper_write_eflags(cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff));
gen_helper_write_eflags(cpu_env, cpu_T[0],
tcg_const_i32((TF_MASK |
AC_MASK |
ID_MASK |
NT_MASK |
IF_MASK)
& 0xffff));
}
} else {
if (s->dflag) {
gen_helper_write_eflags(cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK)));
gen_helper_write_eflags(cpu_env, cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK |
ID_MASK | NT_MASK)));
} else {
gen_helper_write_eflags(cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff));
gen_helper_write_eflags(cpu_env, cpu_T[0],
tcg_const_i32((TF_MASK | AC_MASK |
ID_MASK | NT_MASK)
& 0xffff));
}
}
}
@ -6814,13 +6832,13 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
case 0xfa: /* cli */
if (!s->vm86) {
if (s->cpl <= s->iopl) {
gen_helper_cli();
gen_helper_cli(cpu_env);
} else {
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
}
} else {
if (s->iopl == 3) {
gen_helper_cli();
gen_helper_cli(cpu_env);
} else {
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
}
@ -6830,12 +6848,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
if (!s->vm86) {
if (s->cpl <= s->iopl) {
gen_sti:
gen_helper_sti();
gen_helper_sti(cpu_env);
/* interruptions are enabled only the first insn after sti */
/* If several instructions disable interrupts, only the
_first_ does it */
if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
gen_helper_set_inhibit_irq();
gen_helper_set_inhibit_irq(cpu_env);
/* give a chance to handle pending irqs */
gen_jmp_im(s->pc - s->cs_base);
gen_eob(s);
@ -7578,7 +7596,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
} else {
gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
gen_helper_clts();
gen_helper_clts(cpu_env);
/* abort block because static cpu state changed */
gen_jmp_im(s->pc - s->cs_base);
gen_eob(s);