mirror of https://gitlab.com/qemu-project/qemu
target-sparc: Directly implement easy ld/st asis
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
0cc1f4bf76
commit
f0913be04b
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@ -1980,17 +1980,21 @@ static inline void gen_ne_fop_QD(DisasContext *dc, int rd, int rs,
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typedef enum {
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GET_ASI_HELPER,
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GET_ASI_EXCP,
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GET_ASI_DIRECT,
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} ASIType;
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typedef struct {
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ASIType type;
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int asi;
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int mem_idx;
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TCGMemOp memop;
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} DisasASI;
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static DisasASI get_asi(DisasContext *dc, int insn)
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static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop)
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{
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int asi = GET_FIELD(insn, 19, 26);
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ASIType type = GET_ASI_HELPER;
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int mem_idx = dc->mem_idx;
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#ifndef TARGET_SPARC64
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/* Before v9, all asis are immediate and privileged. */
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@ -2004,6 +2008,16 @@ static DisasASI get_asi(DisasContext *dc, int insn)
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for LEON, which is incorrect. */
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|| (asi == ASI_USERDATA
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&& (dc->def->features & CPU_FEATURE_CASA))) {
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switch (asi) {
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case ASI_USERDATA: /* User data access */
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mem_idx = MMU_USER_IDX;
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type = GET_ASI_DIRECT;
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break;
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case ASI_KERNELDATA: /* Supervisor data access */
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mem_idx = MMU_KERNEL_IDX;
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type = GET_ASI_DIRECT;
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break;
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}
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} else {
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gen_exception(dc, TT_PRIV_INSN);
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type = GET_ASI_EXCP;
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@ -2012,19 +2026,77 @@ static DisasASI get_asi(DisasContext *dc, int insn)
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if (IS_IMM) {
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asi = dc->asi;
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}
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/* With v9, all asis below 0x80 are privileged. */
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/* ??? We ought to check cpu_has_hypervisor, but we didn't copy
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down that bit into DisasContext. For the moment that's ok,
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since the direct implementations below doesn't have any ASIs
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in the restricted [0x30, 0x7f] range, and the check will be
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done properly in the helper. */
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if (!supervisor(dc) && asi < 0x80) {
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gen_exception(dc, TT_PRIV_ACT);
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type = GET_ASI_EXCP;
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} else {
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switch (asi) {
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case ASI_N: /* Nucleus */
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case ASI_NL: /* Nucleus LE */
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mem_idx = MMU_NUCLEUS_IDX;
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break;
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case ASI_AIUP: /* As if user primary */
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case ASI_AIUPL: /* As if user primary LE */
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mem_idx = MMU_USER_IDX;
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break;
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case ASI_AIUS: /* As if user secondary */
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case ASI_AIUSL: /* As if user secondary LE */
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mem_idx = MMU_USER_SECONDARY_IDX;
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break;
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case ASI_S: /* Secondary */
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case ASI_SL: /* Secondary LE */
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if (mem_idx == MMU_USER_IDX) {
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mem_idx = MMU_USER_SECONDARY_IDX;
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} else if (mem_idx == MMU_KERNEL_IDX) {
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mem_idx = MMU_KERNEL_SECONDARY_IDX;
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}
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break;
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case ASI_P: /* Primary */
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case ASI_PL: /* Primary LE */
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break;
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}
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switch (asi) {
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case ASI_N:
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case ASI_NL:
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case ASI_AIUP:
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case ASI_AIUPL:
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case ASI_AIUS:
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case ASI_AIUSL:
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case ASI_S:
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case ASI_SL:
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case ASI_P:
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case ASI_PL:
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type = GET_ASI_DIRECT;
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break;
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}
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/* The little-endian asis all have bit 3 set. */
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if (asi & 8) {
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memop ^= MO_BSWAP;
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}
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}
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#endif
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return (DisasASI){ type, asi };
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return (DisasASI){ type, asi, mem_idx, memop };
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}
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static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr,
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int insn, TCGMemOp memop)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, memop);
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switch (da.type) {
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case GET_ASI_EXCP:
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break;
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case GET_ASI_DIRECT:
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gen_address_mask(dc, addr);
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tcg_gen_qemu_ld_tl(dst, addr, da.mem_idx, da.memop);
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break;
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default:
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{
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TCGv_i32 r_asi = tcg_const_i32(da.asi);
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@ -2053,11 +2125,15 @@ static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr,
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static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr,
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int insn, TCGMemOp memop)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, memop);
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switch (da.type) {
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case GET_ASI_EXCP:
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break;
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case GET_ASI_DIRECT:
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gen_address_mask(dc, addr);
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tcg_gen_qemu_st_tl(src, addr, da.mem_idx, da.memop);
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break;
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default:
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{
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TCGv_i32 r_asi = tcg_const_i32(da.asi);
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@ -2087,7 +2163,7 @@ static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr,
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static void gen_swap_asi(DisasContext *dc, TCGv dst, TCGv src,
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TCGv addr, int insn)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, MO_TEUL);
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switch (da.type) {
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case GET_ASI_EXCP:
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@ -2121,7 +2197,7 @@ static void gen_swap_asi(DisasContext *dc, TCGv dst, TCGv src,
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static void gen_cas_asi(DisasContext *dc, TCGv addr, TCGv val2,
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int insn, int rd)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, MO_TEUL);
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TCGv val1, dst;
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TCGv_i32 r_asi;
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@ -2140,7 +2216,7 @@ static void gen_cas_asi(DisasContext *dc, TCGv addr, TCGv val2,
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static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, MO_UB);
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switch (da.type) {
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case GET_ASI_EXCP:
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@ -2175,7 +2251,7 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn)
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static void gen_ldf_asi(DisasContext *dc, TCGv addr,
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int insn, int size, int rd)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, (size == 4 ? MO_TEUL : MO_TEQ));
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switch (da.type) {
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case GET_ASI_EXCP:
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@ -2199,7 +2275,7 @@ static void gen_ldf_asi(DisasContext *dc, TCGv addr,
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static void gen_stf_asi(DisasContext *dc, TCGv addr,
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int insn, int size, int rd)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, (size == 4 ? MO_TEUL : MO_TEQ));
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switch (da.type) {
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case GET_ASI_EXCP:
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@ -2223,7 +2299,7 @@ static void gen_stf_asi(DisasContext *dc, TCGv addr,
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static void gen_ldda_asi(DisasContext *dc, TCGv hi, TCGv addr,
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int insn, int rd)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, MO_TEQ);
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switch (da.type) {
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case GET_ASI_EXCP:
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@ -2245,7 +2321,7 @@ static void gen_ldda_asi(DisasContext *dc, TCGv hi, TCGv addr,
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static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
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int insn, int rd)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, MO_TEQ);
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TCGv lo = gen_load_gpr(dc, rd + 1);
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switch (da.type) {
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@ -2273,7 +2349,7 @@ static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
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static void gen_casx_asi(DisasContext *dc, TCGv addr, TCGv val2,
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int insn, int rd)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, MO_TEQ);
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TCGv val1 = gen_load_gpr(dc, rd);
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TCGv dst = gen_dest_gpr(dc, rd);
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TCGv_i32 r_asi;
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@ -2297,9 +2373,9 @@ static void gen_ldda_asi(DisasContext *dc, TCGv hi, TCGv addr,
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whereby "rd + 1" elicits "error: array subscript is above array".
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Since we have already asserted that rd is even, the semantics
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are unchanged. */
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DisasASI da = get_asi(dc, insn);
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TCGv lo = gen_dest_gpr(dc, rd | 1);
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TCGv_i64 t64 = tcg_temp_new_i64();
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DisasASI da = get_asi(dc, insn, MO_TEQ);
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switch (da.type) {
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case GET_ASI_EXCP:
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@ -2329,7 +2405,7 @@ static void gen_ldda_asi(DisasContext *dc, TCGv hi, TCGv addr,
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static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
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int insn, int rd)
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{
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DisasASI da = get_asi(dc, insn);
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DisasASI da = get_asi(dc, insn, MO_TEQ);
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TCGv lo = gen_load_gpr(dc, rd + 1);
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TCGv_i64 t64 = tcg_temp_new_i64();
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