s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-23-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -297,6 +297,12 @@ DEF_HELPER_FLAGS_6(gvec_vfma128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, en
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DEF_HELPER_FLAGS_6(gvec_vfms32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfms128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfnma32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfnma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfnma128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfnms32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfnms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfnms128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfsq32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfsq128, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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@ -1259,6 +1259,10 @@
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F(0xe78f, VFMA, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC)
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/* VECTOR FP MULTIPLY AND SUBTRACT */
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F(0xe78e, VFMS, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC)
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/* VECTOR FP NEGATIVE MULTIPLY AND ADD */
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F(0xe79f, VFNMA, VRR_e, VE, 0, 0, 0, 0, vfma, 0, IF_VEC)
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/* VECTOR FP NEGATIVE MULTIPLY AND SUBTRACT */
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F(0xe79e, VFNMS, VRR_e, VE, 0, 0, 0, 0, vfma, 0, IF_VEC)
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/* VECTOR FP PERFORM SIGN OPERATION */
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F(0xe7cc, VFPSO, VRR_a, V, 0, 0, 0, 0, vfpso, 0, IF_VEC)
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/* VECTOR FP SQUARE ROOT */
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@ -2820,7 +2820,8 @@ static DisasJumpType op_vfma(DisasContext *s, DisasOps *o)
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const uint8_t fpf = get_field(s, m6);
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gen_helper_gvec_4_ptr *fn = NULL;
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if (s->fields.op2 == 0x8f) {
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switch (s->fields.op2) {
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case 0x8f:
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switch (fpf) {
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case FPF_SHORT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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@ -2838,7 +2839,8 @@ static DisasJumpType op_vfma(DisasContext *s, DisasOps *o)
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default:
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break;
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}
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} else {
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break;
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case 0x8e:
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switch (fpf) {
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case FPF_SHORT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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@ -2856,6 +2858,39 @@ static DisasJumpType op_vfma(DisasContext *s, DisasOps *o)
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default:
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break;
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}
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break;
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case 0x9f:
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switch (fpf) {
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case FPF_SHORT:
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fn = gen_helper_gvec_vfnma32;
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break;
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case FPF_LONG:
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fn = gen_helper_gvec_vfnma64;
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break;
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case FPF_EXT:
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fn = gen_helper_gvec_vfnma128;
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break;
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default:
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break;
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}
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break;
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case 0x9e:
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switch (fpf) {
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case FPF_SHORT:
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fn = gen_helper_gvec_vfnms32;
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break;
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case FPF_LONG:
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fn = gen_helper_gvec_vfnms64;
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break;
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case FPF_EXT:
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fn = gen_helper_gvec_vfnms128;
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break;
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default:
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break;
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}
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break;
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default:
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g_assert_not_reached();
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}
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if (!fn || extract32(m5, 0, 3)) {
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@ -663,6 +663,8 @@ void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3, \
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DEF_GVEC_VFMA(vfma, 0)
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DEF_GVEC_VFMA(vfms, float_muladd_negate_c)
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DEF_GVEC_VFMA(vfnma, float_muladd_negate_result)
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DEF_GVEC_VFMA(vfnms, float_muladd_negate_c | float_muladd_negate_result)
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void HELPER(gvec_vftci32)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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