unicore32-softmmu: Make sure that kernel can access user space
As a matter of course, we need to access user space in kernel code, so we need to correct load/store decoders to indicate correct memory region. Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -33,9 +33,16 @@ typedef struct DisasContext {
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int condlabel;
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struct TranslationBlock *tb;
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int singlestep_enabled;
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#ifndef CONFIG_USER_ONLY
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int user;
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#endif
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} DisasContext;
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#define IS_USER(s) 1
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#ifndef CONFIG_USER_ONLY
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#define IS_USER(s) (s->user)
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#else
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#define IS_USER(s) 1
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#endif
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/* These instructions trap after executing, so defer them until after the
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conditional executions state has been updated. */
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@ -1554,12 +1561,12 @@ static void do_misc(CPUUniCore32State *env, DisasContext *s, uint32_t insn)
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/* load/store I_offset and R_offset */
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static void do_ldst_ir(CPUUniCore32State *env, DisasContext *s, uint32_t insn)
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{
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unsigned int i;
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unsigned int mmu_idx;
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TCGv tmp;
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TCGv tmp2;
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tmp2 = load_reg(s, UCOP_REG_N);
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i = (IS_USER(s) || (!UCOP_SET_P && UCOP_SET_W));
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mmu_idx = (IS_USER(s) || (!UCOP_SET_P && UCOP_SET_W));
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/* immediate */
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if (UCOP_SET_P) {
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@ -1569,17 +1576,17 @@ static void do_ldst_ir(CPUUniCore32State *env, DisasContext *s, uint32_t insn)
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if (UCOP_SET_L) {
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/* load */
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if (UCOP_SET_B) {
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tmp = gen_ld8u(tmp2, i);
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tmp = gen_ld8u(tmp2, mmu_idx);
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} else {
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tmp = gen_ld32(tmp2, i);
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tmp = gen_ld32(tmp2, mmu_idx);
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}
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} else {
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/* store */
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tmp = load_reg(s, UCOP_REG_D);
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if (UCOP_SET_B) {
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gen_st8(tmp, tmp2, i);
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gen_st8(tmp, tmp2, mmu_idx);
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} else {
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gen_st32(tmp, tmp2, i);
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gen_st32(tmp, tmp2, mmu_idx);
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}
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}
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if (!UCOP_SET_P) {
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@ -1682,7 +1689,7 @@ static void do_ldst_hwsb(CPUUniCore32State *env, DisasContext *s, uint32_t insn)
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/* load/store multiple words */
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static void do_ldst_m(CPUUniCore32State *env, DisasContext *s, uint32_t insn)
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{
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unsigned int val, i;
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unsigned int val, i, mmu_idx;
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int j, n, reg, user, loaded_base;
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TCGv tmp;
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TCGv tmp2;
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@ -1703,6 +1710,7 @@ static void do_ldst_m(CPUUniCore32State *env, DisasContext *s, uint32_t insn)
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}
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}
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mmu_idx = (IS_USER(s) || (!UCOP_SET_P && UCOP_SET_W));
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addr = load_reg(s, UCOP_REG_N);
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/* compute total size */
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@ -1747,7 +1755,7 @@ static void do_ldst_m(CPUUniCore32State *env, DisasContext *s, uint32_t insn)
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}
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if (UCOP_SET(i)) {
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if (UCOP_SET_L) { /* load */
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tmp = gen_ld32(addr, IS_USER(s));
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tmp = gen_ld32(addr, mmu_idx);
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if (reg == 31) {
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gen_bx(s, tmp);
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} else if (user) {
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@ -1775,7 +1783,7 @@ static void do_ldst_m(CPUUniCore32State *env, DisasContext *s, uint32_t insn)
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} else {
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tmp = load_reg(s, reg);
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}
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gen_st32(tmp, addr, IS_USER(s));
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gen_st32(tmp, addr, mmu_idx);
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}
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j++;
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/* no need to add after the last transfer */
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@ -1964,6 +1972,14 @@ static inline void gen_intermediate_code_internal(CPUUniCore32State *env,
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max_insns = CF_COUNT_MASK;
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}
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#ifndef CONFIG_USER_ONLY
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if ((env->uncached_asr & ASR_M) == ASR_MODE_USER) {
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dc->user = 1;
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} else {
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dc->user = 0;
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}
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#endif
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gen_icount_start();
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do {
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if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
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