ppx/xics: introduce a parent_reset in ICSStateClass
Just like for the realize handlers, this makes possible to move the common ICSState code of the reset handlers in the ics-base class. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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815049a01b
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@ -537,23 +537,16 @@ static void ics_simple_eoi(ICSState *ics, uint32_t nr)
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}
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}
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}
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}
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static void ics_simple_reset(void *dev)
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static void ics_simple_reset(DeviceState *dev)
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{
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{
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ICSState *ics = ICS_SIMPLE(dev);
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ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
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int i;
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uint8_t flags[ics->nr_irqs];
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for (i = 0; i < ics->nr_irqs; i++) {
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icsc->parent_reset(dev);
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flags[i] = ics->irqs[i].flags;
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}
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}
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memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
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static void ics_simple_reset_handler(void *dev)
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{
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for (i = 0; i < ics->nr_irqs; i++) {
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ics_simple_reset(dev);
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ics->irqs[i].priority = 0xff;
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ics->irqs[i].saved_priority = 0xff;
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ics->irqs[i].flags = flags[i];
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}
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}
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}
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static int ics_simple_dispatch_pre_save(void *opaque)
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static int ics_simple_dispatch_pre_save(void *opaque)
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@ -625,7 +618,7 @@ static void ics_simple_realize(DeviceState *dev, Error **errp)
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ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs);
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ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs);
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qemu_register_reset(ics_simple_reset, ics);
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qemu_register_reset(ics_simple_reset_handler, ics);
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}
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}
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static void ics_simple_class_init(ObjectClass *klass, void *data)
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static void ics_simple_class_init(ObjectClass *klass, void *data)
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@ -635,6 +628,8 @@ static void ics_simple_class_init(ObjectClass *klass, void *data)
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device_class_set_parent_realize(dc, ics_simple_realize,
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device_class_set_parent_realize(dc, ics_simple_realize,
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&isc->parent_realize);
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&isc->parent_realize);
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device_class_set_parent_reset(dc, ics_simple_reset,
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&isc->parent_reset);
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dc->vmsd = &vmstate_ics_simple;
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dc->vmsd = &vmstate_ics_simple;
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isc->reject = ics_simple_reject;
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isc->reject = ics_simple_reject;
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@ -650,6 +645,25 @@ static const TypeInfo ics_simple_info = {
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.class_size = sizeof(ICSStateClass),
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.class_size = sizeof(ICSStateClass),
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};
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};
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static void ics_base_reset(DeviceState *dev)
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{
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ICSState *ics = ICS_BASE(dev);
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int i;
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uint8_t flags[ics->nr_irqs];
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for (i = 0; i < ics->nr_irqs; i++) {
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flags[i] = ics->irqs[i].flags;
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}
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memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
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for (i = 0; i < ics->nr_irqs; i++) {
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ics->irqs[i].priority = 0xff;
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ics->irqs[i].saved_priority = 0xff;
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ics->irqs[i].flags = flags[i];
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}
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}
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static void ics_base_realize(DeviceState *dev, Error **errp)
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static void ics_base_realize(DeviceState *dev, Error **errp)
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{
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{
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ICSState *ics = ICS_BASE(dev);
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ICSState *ics = ICS_BASE(dev);
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@ -689,6 +703,7 @@ static void ics_base_class_init(ObjectClass *klass, void *data)
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dc->realize = ics_base_realize;
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dc->realize = ics_base_realize;
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dc->props = ics_base_properties;
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dc->props = ics_base_properties;
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dc->reset = ics_base_reset;
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}
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}
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static const TypeInfo ics_base_info = {
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static const TypeInfo ics_base_info = {
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@ -324,25 +324,18 @@ static void ics_kvm_set_irq(void *opaque, int srcno, int val)
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}
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}
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}
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}
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static void ics_kvm_reset(void *dev)
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static void ics_kvm_reset(DeviceState *dev)
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{
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{
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ICSState *ics = ICS_SIMPLE(dev);
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ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
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int i;
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uint8_t flags[ics->nr_irqs];
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for (i = 0; i < ics->nr_irqs; i++) {
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icsc->parent_reset(dev);
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flags[i] = ics->irqs[i].flags;
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}
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memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
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ics_set_kvm_state(ICS_KVM(dev), 1);
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}
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for (i = 0; i < ics->nr_irqs; i++) {
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static void ics_kvm_reset_handler(void *dev)
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ics->irqs[i].priority = 0xff;
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{
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ics->irqs[i].saved_priority = 0xff;
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ics_kvm_reset(dev);
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ics->irqs[i].flags = flags[i];
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}
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ics_set_kvm_state(ics, 1);
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}
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}
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static void ics_kvm_realize(DeviceState *dev, Error **errp)
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static void ics_kvm_realize(DeviceState *dev, Error **errp)
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@ -358,7 +351,7 @@ static void ics_kvm_realize(DeviceState *dev, Error **errp)
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}
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}
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ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
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ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
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qemu_register_reset(ics_kvm_reset, ics);
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qemu_register_reset(ics_kvm_reset_handler, ics);
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}
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}
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static void ics_kvm_class_init(ObjectClass *klass, void *data)
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static void ics_kvm_class_init(ObjectClass *klass, void *data)
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@ -371,6 +364,7 @@ static void ics_kvm_class_init(ObjectClass *klass, void *data)
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* directly from ics-base and not from ics-simple anymore.
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* directly from ics-base and not from ics-simple anymore.
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*/
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*/
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dc->realize = ics_kvm_realize;
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dc->realize = ics_kvm_realize;
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dc->reset = ics_kvm_reset;
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icsc->pre_save = ics_get_kvm_state;
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icsc->pre_save = ics_get_kvm_state;
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icsc->post_load = ics_set_kvm_state;
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icsc->post_load = ics_set_kvm_state;
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@ -116,6 +116,7 @@ struct ICSStateClass {
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DeviceClass parent_class;
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DeviceClass parent_class;
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DeviceRealize parent_realize;
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DeviceRealize parent_realize;
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DeviceReset parent_reset;
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void (*pre_save)(ICSState *s);
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void (*pre_save)(ICSState *s);
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int (*post_load)(ICSState *s, int version_id);
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int (*post_load)(ICSState *s, int version_id);
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