target-i386: Use xsave structs for ext_save_area
This doesn't introduce any change in the code, as the offsets and struct sizes match what was present in the table. This can be validated by the QEMU_BUILD_BUG_ON lines on target-i386/cpu.h, which ensures the struct sizes and offsets match the existing values in ext_save_area. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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@ -474,25 +474,32 @@ static const X86RegisterInfo32 x86_reg_info_32[CPU_NB_REGS32] = {
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const ExtSaveArea x86_ext_save_areas[] = {
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[XSTATE_YMM_BIT] =
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{ .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
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.offset = 0x240, .size = 0x100 },
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.offset = offsetof(X86XSaveArea, avx_state),
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.size = sizeof(XSaveAVX) },
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[XSTATE_BNDREGS_BIT] =
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{ .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
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.offset = 0x3c0, .size = 0x40 },
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.offset = offsetof(X86XSaveArea, bndreg_state),
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.size = sizeof(XSaveBNDREG) },
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[XSTATE_BNDCSR_BIT] =
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{ .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
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.offset = 0x400, .size = 0x40 },
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.offset = offsetof(X86XSaveArea, bndcsr_state),
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.size = sizeof(XSaveBNDCSR) },
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[XSTATE_OPMASK_BIT] =
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{ .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
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.offset = 0x440, .size = 0x40 },
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.offset = offsetof(X86XSaveArea, opmask_state),
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.size = sizeof(XSaveOpmask) },
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[XSTATE_ZMM_Hi256_BIT] =
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{ .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
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.offset = 0x480, .size = 0x200 },
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.offset = offsetof(X86XSaveArea, zmm_hi256_state),
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.size = sizeof(XSaveZMM_Hi256) },
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[XSTATE_Hi16_ZMM_BIT] =
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{ .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
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.offset = 0x680, .size = 0x400 },
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.offset = offsetof(X86XSaveArea, hi16_zmm_state),
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.size = sizeof(XSaveHi16_ZMM) },
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[XSTATE_PKRU_BIT] =
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{ .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_PKU,
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.offset = 0xA80, .size = 0x8 },
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.offset = offsetof(X86XSaveArea, pkru_state),
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.size = sizeof(XSavePKRU) },
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};
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const char *get_register_name_32(unsigned int reg)
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