tcg-aarch64: Introduce tcg_out_insn_3507
Cleaning up the implementation of REV and REV16 at the same time. Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -327,6 +327,11 @@ typedef enum {
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I3506_CSEL = 0x1a800000,
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I3506_CSINC = 0x1a800400,
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/* Data-processing (1 source) instructions. */
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I3507_REV16 = 0x5ac00400,
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I3507_REV32 = 0x5ac00800,
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I3507_REV64 = 0x5ac00c00,
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/* Data-processing (2 source) instructions. */
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I3508_LSLV = 0x1ac02000,
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I3508_LSRV = 0x1ac02400,
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@ -545,6 +550,12 @@ static void tcg_out_insn_3506(TCGContext *s, AArch64Insn insn, TCGType ext,
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| tcg_cond_to_aarch64[c] << 12);
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}
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static void tcg_out_insn_3507(TCGContext *s, AArch64Insn insn, TCGType ext,
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TCGReg rd, TCGReg rn)
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{
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tcg_out32(s, insn | ext << 31 | rn << 5 | rd);
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}
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static void tcg_out_insn_3509(TCGContext *s, AArch64Insn insn, TCGType ext,
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TCGReg rd, TCGReg rn, TCGReg rm, TCGReg ra)
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{
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@ -960,20 +971,19 @@ static void tcg_out_brcond(TCGContext *s, TCGMemOp ext, TCGCond c, TCGArg a,
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}
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}
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static inline void tcg_out_rev(TCGContext *s, TCGType ext,
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TCGReg rd, TCGReg rm)
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static inline void tcg_out_rev64(TCGContext *s, TCGReg rd, TCGReg rn)
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{
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/* using REV 0x5ac00800 */
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unsigned int base = ext ? 0xdac00c00 : 0x5ac00800;
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tcg_out32(s, base | rm << 5 | rd);
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tcg_out_insn(s, 3507, REV64, TCG_TYPE_I64, rd, rn);
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}
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static inline void tcg_out_rev16(TCGContext *s, TCGType ext,
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TCGReg rd, TCGReg rm)
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static inline void tcg_out_rev32(TCGContext *s, TCGReg rd, TCGReg rn)
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{
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/* using REV16 0x5ac00400 */
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unsigned int base = ext ? 0xdac00400 : 0x5ac00400;
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tcg_out32(s, base | rm << 5 | rd);
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tcg_out_insn(s, 3507, REV32, TCG_TYPE_I32, rd, rn);
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}
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static inline void tcg_out_rev16(TCGContext *s, TCGReg rd, TCGReg rn)
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{
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tcg_out_insn(s, 3507, REV16, TCG_TYPE_I32, rd, rn);
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}
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static inline void tcg_out_sxt(TCGContext *s, TCGType ext, TCGMemOp s_bits,
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@ -1205,13 +1215,13 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp memop,
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case MO_UW:
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tcg_out_ldst_r(s, LDST_16, LDST_LD, data_r, addr_r, off_r);
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if (bswap) {
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tcg_out_rev16(s, TCG_TYPE_I32, data_r, data_r);
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tcg_out_rev16(s, data_r, data_r);
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}
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break;
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case MO_SW:
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if (bswap) {
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tcg_out_ldst_r(s, LDST_16, LDST_LD, data_r, addr_r, off_r);
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tcg_out_rev16(s, TCG_TYPE_I32, data_r, data_r);
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tcg_out_rev16(s, data_r, data_r);
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tcg_out_sxt(s, TCG_TYPE_I64, MO_16, data_r, data_r);
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} else {
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tcg_out_ldst_r(s, LDST_16, LDST_LD_S_X, data_r, addr_r, off_r);
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@ -1220,13 +1230,13 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp memop,
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case MO_UL:
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tcg_out_ldst_r(s, LDST_32, LDST_LD, data_r, addr_r, off_r);
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if (bswap) {
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tcg_out_rev(s, TCG_TYPE_I32, data_r, data_r);
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tcg_out_rev32(s, data_r, data_r);
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}
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break;
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case MO_SL:
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if (bswap) {
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tcg_out_ldst_r(s, LDST_32, LDST_LD, data_r, addr_r, off_r);
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tcg_out_rev(s, TCG_TYPE_I32, data_r, data_r);
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tcg_out_rev32(s, data_r, data_r);
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tcg_out_sxt(s, TCG_TYPE_I64, MO_32, data_r, data_r);
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} else {
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tcg_out_ldst_r(s, LDST_32, LDST_LD_S_X, data_r, addr_r, off_r);
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@ -1235,7 +1245,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp memop,
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case MO_Q:
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tcg_out_ldst_r(s, LDST_64, LDST_LD, data_r, addr_r, off_r);
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if (bswap) {
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tcg_out_rev(s, TCG_TYPE_I64, data_r, data_r);
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tcg_out_rev64(s, data_r, data_r);
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}
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break;
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default:
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@ -1254,21 +1264,21 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp memop,
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break;
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case MO_16:
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if (bswap && data_r != TCG_REG_XZR) {
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tcg_out_rev16(s, TCG_TYPE_I32, TCG_REG_TMP, data_r);
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tcg_out_rev16(s, TCG_REG_TMP, data_r);
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data_r = TCG_REG_TMP;
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}
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tcg_out_ldst_r(s, LDST_16, LDST_ST, data_r, addr_r, off_r);
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break;
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case MO_32:
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if (bswap && data_r != TCG_REG_XZR) {
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tcg_out_rev(s, TCG_TYPE_I32, TCG_REG_TMP, data_r);
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tcg_out_rev32(s, TCG_REG_TMP, data_r);
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data_r = TCG_REG_TMP;
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}
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tcg_out_ldst_r(s, LDST_32, LDST_ST, data_r, addr_r, off_r);
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break;
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case MO_64:
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if (bswap && data_r != TCG_REG_XZR) {
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tcg_out_rev(s, TCG_TYPE_I64, TCG_REG_TMP, data_r);
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tcg_out_rev64(s, TCG_REG_TMP, data_r);
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data_r = TCG_REG_TMP;
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}
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tcg_out_ldst_r(s, LDST_64, LDST_ST, data_r, addr_r, off_r);
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@ -1591,17 +1601,16 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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tcg_out_qemu_st(s, REG0(0), a1, a2, args[3]);
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break;
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case INDEX_op_bswap32_i64:
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/* Despite the _i64, this is a 32-bit bswap. */
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ext = 0;
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/* FALLTHRU */
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case INDEX_op_bswap64_i64:
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tcg_out_rev64(s, a0, a1);
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break;
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case INDEX_op_bswap32_i64:
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case INDEX_op_bswap32_i32:
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tcg_out_rev(s, ext, a0, a1);
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tcg_out_rev32(s, a0, a1);
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break;
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case INDEX_op_bswap16_i64:
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case INDEX_op_bswap16_i32:
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tcg_out_rev16(s, TCG_TYPE_I32, a0, a1);
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tcg_out_rev16(s, a0, a1);
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break;
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case INDEX_op_ext8s_i64:
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