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misc: Use cpu_physical_memory_read and cpu_physical_memory_write

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These functions don't need type casts (as does cpu_physical_memory_rw)
and also make the code better readable.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
Stefan Weil 2014-04-07 20:28:23 +02:00 committed by Michael Tokarev
parent 411f491e0a
commit eb6282f230
4 changed files with 23 additions and 26 deletions
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2
cpus.c
View File

@ -1454,7 +1454,7 @@ void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
l = sizeof(buf); l = sizeof(buf);
if (l > size) if (l > size)
l = size; l = size;
cpu_physical_memory_rw(addr, buf, l, 0); cpu_physical_memory_read(addr, buf, l);
if (fwrite(buf, 1, l, f) != l) { if (fwrite(buf, 1, l, f) != l) {
error_set(errp, QERR_IO_ERROR); error_set(errp, QERR_IO_ERROR);
goto exit; goto exit;

31
hw/i386/kvmvapic.c
View File

@ -124,14 +124,14 @@ static const TPRInstruction tpr_instr[] = {
static void read_guest_rom_state(VAPICROMState *s) static void read_guest_rom_state(VAPICROMState *s)
{ {
cpu_physical_memory_rw(s->rom_state_paddr, (void *)&s->rom_state, cpu_physical_memory_read(s->rom_state_paddr, &s->rom_state,
sizeof(GuestROMState), 0); sizeof(GuestROMState));
} }
static void write_guest_rom_state(VAPICROMState *s) static void write_guest_rom_state(VAPICROMState *s)
{ {
cpu_physical_memory_rw(s->rom_state_paddr, (void *)&s->rom_state, cpu_physical_memory_write(s->rom_state_paddr, &s->rom_state,
sizeof(GuestROMState), 1); sizeof(GuestROMState));
} }
static void update_guest_rom_state(VAPICROMState *s) static void update_guest_rom_state(VAPICROMState *s)
@ -311,16 +311,14 @@ static int update_rom_mapping(VAPICROMState *s, CPUX86State *env, target_ulong i
for (pos = le32_to_cpu(s->rom_state.fixup_start); for (pos = le32_to_cpu(s->rom_state.fixup_start);
pos < le32_to_cpu(s->rom_state.fixup_end); pos < le32_to_cpu(s->rom_state.fixup_end);
pos += 4) { pos += 4) {
cpu_physical_memory_rw(paddr + pos - s->rom_state.vaddr, cpu_physical_memory_read(paddr + pos - s->rom_state.vaddr,
(void *)&offset, sizeof(offset), 0); &offset, sizeof(offset));
offset = le32_to_cpu(offset); offset = le32_to_cpu(offset);
cpu_physical_memory_rw(paddr + offset, (void *)&patch, cpu_physical_memory_read(paddr + offset, &patch, sizeof(patch));
sizeof(patch), 0);
patch = le32_to_cpu(patch); patch = le32_to_cpu(patch);
patch += rom_state_vaddr - le32_to_cpu(s->rom_state.vaddr); patch += rom_state_vaddr - le32_to_cpu(s->rom_state.vaddr);
patch = cpu_to_le32(patch); patch = cpu_to_le32(patch);
cpu_physical_memory_rw(paddr + offset, (void *)&patch, cpu_physical_memory_write(paddr + offset, &patch, sizeof(patch));
sizeof(patch), 1);
} }
read_guest_rom_state(s); read_guest_rom_state(s);
s->vapic_paddr = paddr + le32_to_cpu(s->rom_state.vapic_vaddr) - s->vapic_paddr = paddr + le32_to_cpu(s->rom_state.vapic_vaddr) -
@ -364,8 +362,8 @@ static int vapic_enable(VAPICROMState *s, X86CPU *cpu)
} }
vapic_paddr = s->vapic_paddr + vapic_paddr = s->vapic_paddr +
(((hwaddr)cpu_number) << VAPIC_CPU_SHIFT); (((hwaddr)cpu_number) << VAPIC_CPU_SHIFT);
cpu_physical_memory_rw(vapic_paddr + offsetof(VAPICState, enabled), cpu_physical_memory_write(vapic_paddr + offsetof(VAPICState, enabled),
(void *)&enabled, sizeof(enabled), 1); &enabled, sizeof(enabled));
apic_enable_vapic(cpu->apic_state, vapic_paddr); apic_enable_vapic(cpu->apic_state, vapic_paddr);
s->state = VAPIC_ACTIVE; s->state = VAPIC_ACTIVE;
@ -535,7 +533,7 @@ static int patch_hypercalls(VAPICROMState *s)
uint8_t *rom; uint8_t *rom;
rom = g_malloc(s->rom_size); rom = g_malloc(s->rom_size);
cpu_physical_memory_rw(rom_paddr, rom, s->rom_size, 0); cpu_physical_memory_read(rom_paddr, rom, s->rom_size);
for (pos = 0; pos < s->rom_size - sizeof(vmcall_pattern); pos++) { for (pos = 0; pos < s->rom_size - sizeof(vmcall_pattern); pos++) {
if (kvm_irqchip_in_kernel()) { if (kvm_irqchip_in_kernel()) {
@ -551,8 +549,7 @@ static int patch_hypercalls(VAPICROMState *s)
} }
if (memcmp(rom + pos, pattern, 7) == 0 && if (memcmp(rom + pos, pattern, 7) == 0 &&
(rom[pos + 7] == alternates[0] || rom[pos + 7] == alternates[1])) { (rom[pos + 7] == alternates[0] || rom[pos + 7] == alternates[1])) {
cpu_physical_memory_rw(rom_paddr + pos + 5, (uint8_t *)patch, cpu_physical_memory_write(rom_paddr + pos + 5, patch, 3);
3, 1);
/* /*
* Don't flush the tb here. Under ordinary conditions, the patched * Don't flush the tb here. Under ordinary conditions, the patched
* calls are miles away from the current IP. Under malicious * calls are miles away from the current IP. Under malicious
@ -760,8 +757,8 @@ static int vapic_post_load(void *opaque, int version_id)
run_on_cpu(first_cpu, do_vapic_enable, s); run_on_cpu(first_cpu, do_vapic_enable, s);
} else { } else {
zero = g_malloc0(s->rom_state.vapic_size); zero = g_malloc0(s->rom_state.vapic_size);
cpu_physical_memory_rw(s->vapic_paddr, zero, cpu_physical_memory_write(s->vapic_paddr, zero,
s->rom_state.vapic_size, 1); s->rom_state.vapic_size);
g_free(zero); g_free(zero);
} }
} }

4
hw/intc/apic.c
View File

@ -98,8 +98,8 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
return; return;
} }
if (sync_type & SYNC_FROM_VAPIC) { if (sync_type & SYNC_FROM_VAPIC) {
cpu_physical_memory_rw(s->vapic_paddr, (void *)&vapic_state, cpu_physical_memory_read(s->vapic_paddr, &vapic_state,
sizeof(vapic_state), 0); sizeof(vapic_state));
s->tpr = vapic_state.tpr; s->tpr = vapic_state.tpr;
} }
if (sync_type & (SYNC_TO_VAPIC | SYNC_ISR_IRR_TO_VAPIC)) { if (sync_type & (SYNC_TO_VAPIC | SYNC_ISR_IRR_TO_VAPIC)) {

12
target-s390x/misc_helper.c
View File

@ -336,7 +336,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
ebcdic_put(sysib.model, "QEMU ", 16); ebcdic_put(sysib.model, "QEMU ", 16);
ebcdic_put(sysib.sequence, "QEMU ", 16); ebcdic_put(sysib.sequence, "QEMU ", 16);
ebcdic_put(sysib.plant, "QEMU", 4); ebcdic_put(sysib.plant, "QEMU", 4);
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
} else if ((sel1 == 2) && (sel2 == 1)) { } else if ((sel1 == 2) && (sel2 == 1)) {
/* Basic Machine CPU */ /* Basic Machine CPU */
struct sysib_121 sysib; struct sysib_121 sysib;
@ -346,7 +346,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16); ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
ebcdic_put(sysib.plant, "QEMU", 4); ebcdic_put(sysib.plant, "QEMU", 4);
stw_p(&sysib.cpu_addr, env->cpu_num); stw_p(&sysib.cpu_addr, env->cpu_num);
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
} else if ((sel1 == 2) && (sel2 == 2)) { } else if ((sel1 == 2) && (sel2 == 2)) {
/* Basic Machine CPUs */ /* Basic Machine CPUs */
struct sysib_122 sysib; struct sysib_122 sysib;
@ -358,7 +358,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
stw_p(&sysib.active_cpus, 1); stw_p(&sysib.active_cpus, 1);
stw_p(&sysib.standby_cpus, 0); stw_p(&sysib.standby_cpus, 0);
stw_p(&sysib.reserved_cpus, 0); stw_p(&sysib.reserved_cpus, 0);
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
} else { } else {
cc = 3; cc = 3;
} }
@ -375,7 +375,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
ebcdic_put(sysib.plant, "QEMU", 4); ebcdic_put(sysib.plant, "QEMU", 4);
stw_p(&sysib.cpu_addr, env->cpu_num); stw_p(&sysib.cpu_addr, env->cpu_num);
stw_p(&sysib.cpu_id, 0); stw_p(&sysib.cpu_id, 0);
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
} else if ((sel1 == 2) && (sel2 == 2)) { } else if ((sel1 == 2) && (sel2 == 2)) {
/* LPAR CPUs */ /* LPAR CPUs */
struct sysib_222 sysib; struct sysib_222 sysib;
@ -392,7 +392,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
stl_p(&sysib.caf, 1000); stl_p(&sysib.caf, 1000);
stw_p(&sysib.dedicated_cpus, 0); stw_p(&sysib.dedicated_cpus, 0);
stw_p(&sysib.shared_cpus, 0); stw_p(&sysib.shared_cpus, 0);
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
} else { } else {
cc = 3; cc = 3;
} }
@ -414,7 +414,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
ebcdic_put(sysib.vm[0].name, "KVMguest", 8); ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
stl_p(&sysib.vm[0].caf, 1000); stl_p(&sysib.vm[0].caf, 1000);
ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16); ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
} else { } else {
cc = 3; cc = 3;
} }