From dec71d2d63b766136d5b6ded616dcc3fae18e97d Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sat, 15 Feb 2014 19:16:33 +0400 Subject: [PATCH 1/8] target-xtensa: add definition for XTHAL_INTTYPE_PROFILING There's new interrupt type in the recent Xtensa releases that may appear in configuration overlay. Add definition so that new cores that use it could be automatically imported. Signed-off-by: Max Filippov --- target-xtensa/cpu.h | 1 + target-xtensa/overlay_tool.h | 1 + 2 files changed, 2 insertions(+) diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 9cf52758c7..beb5486fc7 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -266,6 +266,7 @@ typedef enum { INTTYPE_TIMER, INTTYPE_DEBUG, INTTYPE_WRITE_ERR, + INTTYPE_PROFILING, INTTYPE_MAX } interrupt_type; diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h index 4c0de7f06a..5a1353e545 100644 --- a/target-xtensa/overlay_tool.h +++ b/target-xtensa/overlay_tool.h @@ -163,6 +163,7 @@ #define XTHAL_INTTYPE_TBD1 INTTYPE_DEBUG #define XTHAL_INTTYPE_TBD2 INTTYPE_WRITE_ERR #define XTHAL_INTTYPE_WRITE_ERROR INTTYPE_WRITE_ERR +#define XTHAL_INTTYPE_PROFILING INTTYPE_PROFILING #define INTERRUPT(i) { \ From 20303e42d4726018ee64798b4d3051cbe6eea9f8 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Wed, 17 Sep 2014 21:13:09 -0700 Subject: [PATCH 2/8] target-xtensa: tests: pre-process tests linker script Xtensa cores have configurable interrupt vectors and endiannes. This information is needed to link executable images correctly for a specific core configuration. Instead of hard-coding dc232 defaults pull endianness, number of high-priority interrupts and location of vectors from the core configuration and pass it through the C preprocessor. While at it clean up tabs and align the initial stack on 16 bytes. Signed-off-by: Max Filippov --- tests/tcg/xtensa/Makefile | 10 ++- tests/tcg/xtensa/linker.ld | 112 ------------------------------ tests/tcg/xtensa/linker.ld.S | 130 +++++++++++++++++++++++++++++++++++ 3 files changed, 137 insertions(+), 115 deletions(-) delete mode 100644 tests/tcg/xtensa/linker.ld create mode 100644 tests/tcg/xtensa/linker.ld.S diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile index a70c92be7e..522a63e36b 100644 --- a/tests/tcg/xtensa/Makefile +++ b/tests/tcg/xtensa/Makefile @@ -13,6 +13,7 @@ SIMFLAGS = --xtensa-core=DC_B_232L --exit_with_target_code $(EXTFLAGS) SIMDEBUG = --gdbserve=0 endif +HOST_CC = gcc CC = $(CROSS)gcc AS = $(CROSS)gcc -x assembler-with-cpp LD = $(CROSS)ld @@ -21,7 +22,7 @@ XTENSA_SRC_PATH = $(SRC_PATH)/tests/tcg/xtensa INCLUDE_DIRS = $(XTENSA_SRC_PATH) $(SRC_PATH)/target-xtensa/core-$(CORE) XTENSA_INC = $(addprefix -I,$(INCLUDE_DIRS)) -LDFLAGS = -T$(XTENSA_SRC_PATH)/linker.ld +LDFLAGS = -Tlinker.ld CRT = crt.o vectors.o @@ -59,13 +60,16 @@ TESTCASES += test_windowed.tst all: build +linker.ld: $(XTENSA_SRC_PATH)/linker.ld.S + $(HOST_CC) $(XTENSA_INC) -E -P $< -o $@ + %.o: $(XTENSA_SRC_PATH)/%.c $(CC) $(XTENSA_INC) $(CFLAGS) -c $< -o $@ %.o: $(XTENSA_SRC_PATH)/%.S $(CC) $(XTENSA_INC) $(ASFLAGS) -c $< -o $@ -%.tst: %.o $(XTENSA_SRC_PATH)/macros.inc $(CRT) Makefile +%.tst: %.o linker.ld $(XTENSA_SRC_PATH)/macros.inc $(CRT) Makefile $(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $< -o $@ build: $(TESTCASES) @@ -85,4 +89,4 @@ host-debug-%.tst: %.tst gdb --args $(SIM) $(SIMFLAGS) ./$< clean: - $(RM) -fr $(TESTCASES) $(CRT) + $(RM) -fr $(TESTCASES) $(CRT) linker.ld diff --git a/tests/tcg/xtensa/linker.ld b/tests/tcg/xtensa/linker.ld deleted file mode 100644 index 4d0b307fd2..0000000000 --- a/tests/tcg/xtensa/linker.ld +++ /dev/null @@ -1,112 +0,0 @@ -OUTPUT_FORMAT("elf32-xtensa-le") -ENTRY(_start) - -__DYNAMIC = 0; - -MEMORY { - ram : ORIGIN = 0xd0000000, LENGTH = 0x08000000 /* 128M */ - rom : ORIGIN = 0xfe000000, LENGTH = 0x00001000 /* 4k */ -} - -SECTIONS -{ - .init : - { - *(.init) - *(.init.*) - } > rom - - .vector : - { - . = 0x00000000; - *(.vector.window_overflow_4) - *(.vector.window_overflow_4.*) - . = 0x00000040; - *(.vector.window_underflow_4) - *(.vector.window_underflow_4.*) - . = 0x00000080; - *(.vector.window_overflow_8) - *(.vector.window_overflow_8.*) - . = 0x000000c0; - *(.vector.window_underflow_8) - *(.vector.window_underflow_8.*) - . = 0x00000100; - *(.vector.window_overflow_12) - *(.vector.window_overflow_12.*) - . = 0x00000140; - *(.vector.window_underflow_12) - *(.vector.window_underflow_12.*) - - . = 0x00000180; - *(.vector.level2) - *(.vector.level2.*) - . = 0x000001c0; - *(.vector.level3) - *(.vector.level3.*) - . = 0x00000200; - *(.vector.level4) - *(.vector.level4.*) - . = 0x00000240; - *(.vector.level5) - *(.vector.level5.*) - . = 0x00000280; - *(.vector.level6) - *(.vector.level6.*) - . = 0x000002c0; - *(.vector.level7) - *(.vector.level7.*) - - . = 0x00000300; - *(.vector.kernel) - *(.vector.kernel.*) - . = 0x00000340; - *(.vector.user) - *(.vector.user.*) - . = 0x000003c0; - *(.vector.double) - *(.vector.double.*) - } > ram - - .text : - { - _ftext = .; - *(.text .stub .text.* .gnu.linkonce.t.* .literal .literal.*) - _etext = .; - } > ram - - .rodata : - { - . = ALIGN(4); - _frodata = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - *(.rodata1) - _erodata = .; - } > ram - - .data : - { - . = ALIGN(4); - _fdata = .; - *(.data .data.* .gnu.linkonce.d.*) - *(.data1) - _gp = ALIGN(16); - *(.sdata .sdata.* .gnu.linkonce.s.*) - _edata = .; - } > ram - - .bss : - { - . = ALIGN(4); - _fbss = .; - *(.dynsbss) - *(.sbss .sbss.* .gnu.linkonce.sb.*) - *(.scommon) - *(.dynbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - _ebss = .; - _end = .; - } > ram -} - -PROVIDE(_fstack = ORIGIN(ram) + LENGTH(ram) - 4); diff --git a/tests/tcg/xtensa/linker.ld.S b/tests/tcg/xtensa/linker.ld.S new file mode 100644 index 0000000000..f1e7fa9f8d --- /dev/null +++ b/tests/tcg/xtensa/linker.ld.S @@ -0,0 +1,130 @@ +#include + +#if XTENSA_HAVE_BE +OUTPUT_FORMAT("elf32-xtensa-be") +#else +OUTPUT_FORMAT("elf32-xtensa-le") +#endif +ENTRY(_start) + +__DYNAMIC = 0; + +MEMORY { + ram : ORIGIN = XCHAL_VECBASE_RESET_VADDR, LENGTH = 0x08000000 /* 128M */ + rom : ORIGIN = XCHAL_RESET_VECTOR_VADDR, LENGTH = 0x00001000 /* 4k */ +} + +SECTIONS +{ + .init : + { + *(.init) + *(.init.*) + } > rom + + .vector : + { + . = XCHAL_WINDOW_OF4_VECOFS; + *(.vector.window_overflow_4) + *(.vector.window_overflow_4.*) + . = XCHAL_WINDOW_UF4_VECOFS; + *(.vector.window_underflow_4) + *(.vector.window_underflow_4.*) + . = XCHAL_WINDOW_OF8_VECOFS; + *(.vector.window_overflow_8) + *(.vector.window_overflow_8.*) + . = XCHAL_WINDOW_UF8_VECOFS; + *(.vector.window_underflow_8) + *(.vector.window_underflow_8.*) + . = XCHAL_WINDOW_OF12_VECOFS; + *(.vector.window_overflow_12) + *(.vector.window_overflow_12.*) + . = XCHAL_WINDOW_UF12_VECOFS; + *(.vector.window_underflow_12) + *(.vector.window_underflow_12.*) + +#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2 + . = XCHAL_INTLEVEL2_VECOFS; + *(.vector.level2) + *(.vector.level2.*) +#endif +#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 3 + . = XCHAL_INTLEVEL3_VECOFS; + *(.vector.level3) + *(.vector.level3.*) +#endif +#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 4 + . = XCHAL_INTLEVEL4_VECOFS; + *(.vector.level4) + *(.vector.level4.*) +#endif +#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 5 + . = XCHAL_INTLEVEL5_VECOFS; + *(.vector.level5) + *(.vector.level5.*) +#endif +#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 6 + . = XCHAL_INTLEVEL6_VECOFS; + *(.vector.level6) + *(.vector.level6.*) +#endif +#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 7 + . = XCHAL_INTLEVEL7_VECOFS; + *(.vector.level7) + *(.vector.level7.*) +#endif + + . = XCHAL_KERNEL_VECOFS; + *(.vector.kernel) + *(.vector.kernel.*) + . = XCHAL_USER_VECOFS; + *(.vector.user) + *(.vector.user.*) + . = XCHAL_DOUBLEEXC_VECOFS; + *(.vector.double) + *(.vector.double.*) + } > ram + + .text : + { + _ftext = .; + *(.text .stub .text.* .gnu.linkonce.t.* .literal .literal.*) + _etext = .; + } > ram + + .rodata : + { + . = ALIGN(4); + _frodata = .; + *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.rodata1) + _erodata = .; + } > ram + + .data : + { + . = ALIGN(4); + _fdata = .; + *(.data .data.* .gnu.linkonce.d.*) + *(.data1) + _gp = ALIGN(16); + *(.sdata .sdata.* .gnu.linkonce.s.*) + _edata = .; + } > ram + + .bss : + { + . = ALIGN(4); + _fbss = .; + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + _ebss = .; + _end = .; + } > ram +} + +PROVIDE(_fstack = (ORIGIN(ram) & 0xf0000000) + LENGTH(ram) - 16); From c9e9521fcb840b14ec0ae9117b224ff8a71418da Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Thu, 25 Sep 2014 16:12:31 +0400 Subject: [PATCH 3/8] target-xtensa: avoid duplicate timer interrupt delivery Timer interrupt should be raised at the same cycle when CCOUNT equals CCOMPARE. As cycles are counted in batches, timer interrupt is sent every time CCOMPARE lies in the interval [old CCOUNT, new CCOUNT]. This is wrong, because when new CCOUNT equals CCOMPARE interrupt is sent twice, once for the upper interval boundary and once for the lower. Fix that by excluding lower interval boundary from the condition. This doesn't have user-visible effect, because CCOMPARE reload always causes CCOUNT increment followed by current timer interrupt reset. Signed-off-by: Max Filippov --- hw/xtensa/pic_cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/xtensa/pic_cpu.c b/hw/xtensa/pic_cpu.c index e2005bd981..18825d19f0 100644 --- a/hw/xtensa/pic_cpu.c +++ b/hw/xtensa/pic_cpu.c @@ -31,14 +31,14 @@ void xtensa_advance_ccount(CPUXtensaState *env, uint32_t d) { - uint32_t old_ccount = env->sregs[CCOUNT]; + uint32_t old_ccount = env->sregs[CCOUNT] + 1; env->sregs[CCOUNT] += d; if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) { int i; for (i = 0; i < env->config->nccompare; ++i) { - if (env->sregs[CCOMPARE + i] - old_ccount <= d) { + if (env->sregs[CCOMPARE + i] - old_ccount < d) { xtensa_timer_irq(env, i, 1); } } From 25bda50a0c7241dcb247483af2b7f961632020cc Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sun, 19 Oct 2014 07:42:22 +0400 Subject: [PATCH 4/8] hw/core/loader: implement address translation in uimage loader Such address translation is needed when load address recorded in uImage is a virtual address. When the actual load address is requested, return untranslated address: user that needs the translated address can always apply translation function to it and those that need it untranslated don't need to do the inverse translation. Add translation function pointer and its parameter to uimage_load prototype. Update all existing users. No user-visible functional changes. Cc: qemu-stable@nongnu.org Signed-off-by: Max Filippov Reviewed-by: Alexander Graf --- hw/arm/boot.c | 2 +- hw/core/loader.c | 17 +++++++++++++---- hw/m68k/an5206.c | 3 ++- hw/m68k/dummy_m68k.c | 3 ++- hw/m68k/mcf5208.c | 3 ++- hw/microblaze/boot.c | 3 ++- hw/openrisc/openrisc_sim.c | 2 +- hw/ppc/e500.c | 3 ++- hw/ppc/ppc440_bamboo.c | 3 ++- hw/xtensa/xtfpga.c | 3 ++- include/hw/loader.h | 4 +++- 11 files changed, 32 insertions(+), 14 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index bffbea5e0e..0014c34ddd 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -580,7 +580,7 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info) entry = elf_entry; if (kernel_size < 0) { kernel_size = load_uimage(info->kernel_filename, &entry, NULL, - &is_linux); + &is_linux, NULL, NULL); } /* On aarch64, it's the bootloader's job to uncompress the kernel. */ if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) { diff --git a/hw/core/loader.c b/hw/core/loader.c index 5f3a8598c5..bbe6eb3d82 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -477,7 +477,9 @@ static ssize_t gunzip(void *dst, size_t dstlen, uint8_t *src, /* Load a U-Boot image. */ static int load_uboot_image(const char *filename, hwaddr *ep, hwaddr *loadaddr, - int *is_linux, uint8_t image_type) + int *is_linux, uint8_t image_type, + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque) { int fd; int size; @@ -511,6 +513,9 @@ static int load_uboot_image(const char *filename, hwaddr *ep, hwaddr *loadaddr, switch (hdr->ih_type) { case IH_TYPE_KERNEL: address = hdr->ih_load; + if (translate_fn) { + address = translate_fn(translate_opaque, address); + } if (loadaddr) { *loadaddr = hdr->ih_load; } @@ -587,15 +592,19 @@ out: } int load_uimage(const char *filename, hwaddr *ep, hwaddr *loadaddr, - int *is_linux) + int *is_linux, + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque) { - return load_uboot_image(filename, ep, loadaddr, is_linux, IH_TYPE_KERNEL); + return load_uboot_image(filename, ep, loadaddr, is_linux, IH_TYPE_KERNEL, + translate_fn, translate_opaque); } /* Load a ramdisk. */ int load_ramdisk(const char *filename, hwaddr addr, uint64_t max_sz) { - return load_uboot_image(filename, NULL, &addr, NULL, IH_TYPE_RAMDISK); + return load_uboot_image(filename, NULL, &addr, NULL, IH_TYPE_RAMDISK, + NULL, NULL); } /* This simply prevents g_malloc in the function below from allocating diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index a9ac27089b..f1f13504c0 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -74,7 +74,8 @@ static void an5206_init(MachineState *machine) NULL, NULL, 1, ELF_MACHINE, 0); entry = elf_entry; if (kernel_size < 0) { - kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL); + kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL, + NULL, NULL); } if (kernel_size < 0) { kernel_size = load_image_targphys(kernel_filename, KERNEL_LOAD_ADDR, diff --git a/hw/m68k/dummy_m68k.c b/hw/m68k/dummy_m68k.c index 957ef82f88..facd561efa 100644 --- a/hw/m68k/dummy_m68k.c +++ b/hw/m68k/dummy_m68k.c @@ -50,7 +50,8 @@ static void dummy_m68k_init(MachineState *machine) NULL, NULL, 1, ELF_MACHINE, 0); entry = elf_entry; if (kernel_size < 0) { - kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL); + kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL, + NULL, NULL); } if (kernel_size < 0) { kernel_size = load_image_targphys(kernel_filename, diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index 188230f901..a01a4458e6 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -279,7 +279,8 @@ static void mcf5208evb_init(MachineState *machine) NULL, NULL, 1, ELF_MACHINE, 0); entry = elf_entry; if (kernel_size < 0) { - kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL); + kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL, + NULL, NULL); } if (kernel_size < 0) { kernel_size = load_image_targphys(kernel_filename, 0x40000000, diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c index 6bf36d046f..a2843cdf99 100644 --- a/hw/microblaze/boot.c +++ b/hw/microblaze/boot.c @@ -154,7 +154,8 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr ddr_base, if (kernel_size < 0) { hwaddr uentry, loadaddr; - kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0); + kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0, + NULL, NULL); boot_info.bootstrap_pc = uentry; high = (loadaddr + kernel_size + 3) & ~3; } diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index c110033c2e..1da0657ddf 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -72,7 +72,7 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size, entry = elf_entry; if (kernel_size < 0) { kernel_size = load_uimage(kernel_filename, - &entry, NULL, NULL); + &entry, NULL, NULL, NULL, NULL); } if (kernel_size < 0) { kernel_size = load_image_targphys(kernel_filename, diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 16c85efab5..2157d87c19 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -830,7 +830,8 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) * Hrm. No ELF image? Try a uImage, maybe someone is giving us an * ePAPR compliant kernel */ - kernel_size = load_uimage(filename, &bios_entry, &loadaddr, NULL); + kernel_size = load_uimage(filename, &bios_entry, &loadaddr, NULL, + NULL, NULL); if (kernel_size < 0) { fprintf(stderr, "qemu: could not load firmware '%s'\n", filename); exit(1); diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index 81a06d310d..778970aa9b 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -253,7 +253,8 @@ static void bamboo_init(MachineState *machine) /* Load kernel. */ if (kernel_filename) { - success = load_uimage(kernel_filename, &entry, &loadaddr, NULL); + success = load_uimage(kernel_filename, &entry, &loadaddr, NULL, + NULL, NULL); if (success < 0) { success = load_elf(kernel_filename, NULL, NULL, &elf_entry, &elf_lowaddr, NULL, 1, ELF_MACHINE, 0); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 0100c3115b..a9b33bc4ee 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -328,7 +328,8 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine) } else { hwaddr ep; int is_linux; - success = load_uimage(kernel_filename, &ep, NULL, &is_linux); + success = load_uimage(kernel_filename, &ep, NULL, &is_linux, + NULL, NULL); if (success > 0 && is_linux) { entry_point = ep; } else { diff --git a/include/hw/loader.h b/include/hw/loader.h index 9190387b8e..054c6a22b5 100644 --- a/include/hw/loader.h +++ b/include/hw/loader.h @@ -30,7 +30,9 @@ int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t), int load_aout(const char *filename, hwaddr addr, int max_sz, int bswap_needed, hwaddr target_page_size); int load_uimage(const char *filename, hwaddr *ep, - hwaddr *loadaddr, int *is_linux); + hwaddr *loadaddr, int *is_linux, + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque); /** * load_ramdisk: From 6d2e4530532ca1dbb5e68bdcca12e10931bc6503 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sun, 19 Oct 2014 08:39:10 +0400 Subject: [PATCH 5/8] hw/xtensa/xtfpga: treat uImage load address as virtual U-boot for xtensa always treats uImage load address as virtual address. This is important when booting uImage on xtensa core with MMUv2, because MMUv2 has fixed non-identity virtual-to-physical mapping after reset. Always do virtual-to-physical translation of uImage load address and load uImage at the translated address. This fixes booting uImage kernels on dc232b and other MMUv2 cores. Cc: qemu-stable@nongnu.org Reported-by: Waldemar Brodkorb Signed-off-by: Max Filippov --- hw/xtensa/xtfpga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index a9b33bc4ee..e5a6bba783 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -329,7 +329,7 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine) hwaddr ep; int is_linux; success = load_uimage(kernel_filename, &ep, NULL, &is_linux, - NULL, NULL); + translate_phys_addr, cpu); if (success > 0 && is_linux) { entry_point = ep; } else { From 9bea2e91a6dec2156416aed7a2d3ef93c3bdb922 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sat, 14 Jun 2014 10:26:22 +0400 Subject: [PATCH 6/8] target-xtensa: add core importing script This script copies configuration and gdb information from the xtensa configuration overlay archive and registers new xtensa core. Signed-off-by: Max Filippov --- target-xtensa/import_core.sh | 53 ++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100755 target-xtensa/import_core.sh diff --git a/target-xtensa/import_core.sh b/target-xtensa/import_core.sh new file mode 100755 index 0000000000..73791ec545 --- /dev/null +++ b/target-xtensa/import_core.sh @@ -0,0 +1,53 @@ +#! /bin/bash -e + +OVERLAY="$1" +NAME="$2" +FREQ=40000 +BASE=$(dirname "$0") +TARGET="$BASE"/core-$NAME + +[ $# -ge 2 -a -f "$OVERLAY" ] || { cat < "$TARGET"/gdb-config.c +NUM_REGS=$(grep XTREG "$TARGET"/gdb-config.c | wc -l) + +cat < "${TARGET}.c" +#include "cpu.h" +#include "exec/exec-all.h" +#include "exec/gdbstub.h" +#include "qemu/host-utils.h" + +#include "core-$NAME/core-isa.h" +#include "overlay_tool.h" + +static const XtensaConfig $NAME __attribute__((unused)) = { + .name = "$NAME", + .gdb_regmap = { + .num_regs = $NUM_REGS, + .reg = { +#include "core-$NAME/gdb-config.c" + } + }, + .clock_freq_khz = $FREQ, + DEFAULT_SECTIONS +}; + +REGISTER_CORE($NAME) +EOF + +grep -q core-${NAME}.o "$BASE"/Makefile.objs || \ + echo "obj-y += core-${NAME}.o" >> "$BASE"/Makefile.objs From ab5824134fa92c3f7de4e307a8c7273c4729f328 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sun, 19 Oct 2014 17:17:34 +0400 Subject: [PATCH 7/8] target-xtensa: fix build for cores w/o windowed registers Cores without windowed registers don't have window overflow/underflow vectors. Move these vectors to a separate group defined conditionally. Signed-off-by: Max Filippov --- target-xtensa/overlay_tool.h | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h index 5a1353e545..6105d4c8ff 100644 --- a/target-xtensa/overlay_tool.h +++ b/target-xtensa/overlay_tool.h @@ -108,20 +108,27 @@ #define XCHAL_WINDOW_UF12_VECOFS 0x00000140 #endif +#if XCHAL_HAVE_WINDOWED +#define WINDOW_VECTORS \ + [EXC_WINDOW_OVERFLOW4] = XCHAL_WINDOW_OF4_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_UNDERFLOW4] = XCHAL_WINDOW_UF4_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_OVERFLOW8] = XCHAL_WINDOW_OF8_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_UNDERFLOW8] = XCHAL_WINDOW_UF8_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_OVERFLOW12] = XCHAL_WINDOW_OF12_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_UNDERFLOW12] = XCHAL_WINDOW_UF12_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, +#else +#define WINDOW_VECTORS +#endif + #define EXCEPTION_VECTORS { \ [EXC_RESET] = XCHAL_RESET_VECTOR_VADDR, \ - [EXC_WINDOW_OVERFLOW4] = XCHAL_WINDOW_OF4_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_UNDERFLOW4] = XCHAL_WINDOW_UF4_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_OVERFLOW8] = XCHAL_WINDOW_OF8_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_UNDERFLOW8] = XCHAL_WINDOW_UF8_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_OVERFLOW12] = XCHAL_WINDOW_OF12_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_UNDERFLOW12] = XCHAL_WINDOW_UF12_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ + WINDOW_VECTORS \ [EXC_KERNEL] = XCHAL_KERNEL_VECTOR_VADDR, \ [EXC_USER] = XCHAL_USER_VECTOR_VADDR, \ [EXC_DOUBLE] = XCHAL_DOUBLEEXC_VECTOR_VADDR, \ From 437a8c11c06f53ed3bcdcc3e5abc5d20b2d439bd Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Wed, 22 Oct 2014 07:25:42 +0400 Subject: [PATCH 8/8] MAINTAINERS: update xtensa boards - fix file names that were changed by the commit b707ab7 hw/xtensa: remove extraneous xtensa_ prefix from file names - mark OpenCores 10/100 Mbit MAC model as maintained. Signed-off-by: Max Filippov --- MAINTAINERS | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 94366ef011..dd02d96624 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -583,12 +583,13 @@ Xtensa Machines sim M: Max Filippov S: Maintained -F: hw/xtensa/xtensa_sim.c +F: hw/xtensa/sim.c -Avnet LX60 +XTFPGA (LX60, LX200, ML605, KC705) M: Max Filippov S: Maintained -F: hw/xtensa/xtensa_lx60.c +F: hw/xtensa/xtfpga.c +F: hw/net/opencores_eth.c Devices -------