target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu
Restrict cpu_exec_interrupt() and its callees to sysemu. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210911165434.531552-14-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -365,10 +365,10 @@ static const struct SysemuCPUOps mb_sysemu_ops = {
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static const struct TCGCPUOps mb_tcg_ops = {
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.initialize = mb_tcg_init,
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.synchronize_from_tb = mb_cpu_synchronize_from_tb,
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.cpu_exec_interrupt = mb_cpu_exec_interrupt,
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.tlb_fill = mb_cpu_tlb_fill,
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#ifndef CONFIG_USER_ONLY
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.cpu_exec_interrupt = mb_cpu_exec_interrupt,
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.do_interrupt = mb_cpu_do_interrupt,
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.do_transaction_failed = mb_cpu_transaction_failed,
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.do_unaligned_access = mb_cpu_do_unaligned_access,
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@ -355,8 +355,10 @@ struct MicroBlazeCPU {
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};
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#ifndef CONFIG_USER_ONLY
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void mb_cpu_do_interrupt(CPUState *cs);
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bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
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#endif /* !CONFIG_USER_ONLY */
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void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr);
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@ -26,16 +26,6 @@
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#if defined(CONFIG_USER_ONLY)
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void mb_cpu_do_interrupt(CPUState *cs)
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{
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MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
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CPUMBState *env = &cpu->env;
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cs->exception_index = -1;
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env->res_addr = RES_ADDR_NONE;
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env->regs[14] = env->pc;
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}
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bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr)
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@ -271,7 +261,6 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr,
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return paddr;
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}
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#endif
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bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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{
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@ -289,6 +278,8 @@ bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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return false;
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}
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#endif /* !CONFIG_USER_ONLY */
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void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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