target/hppa: Fix PSW V-bit packaging in cpu_hppa_get for hppa64
While adding hppa64 support, the psw_v variable got extended from 32 to 64
bits. So, when packaging the PSW-V bit from the psw_v variable for interrupt
processing, check bit 31 instead the 63th (sign) bit.
This fixes a hard to find Linux kernel boot issue where the loss of the PSW-V
bit due to an ITLB interruption in the middle of a series of ds/addc
instructions (from the divU milicode library) generated the wrong division
result and thus triggered a Linux kernel crash.
Link: https://lore.kernel.org/lkml/718b8afe-222f-4b3a-96d3-93af0e4ceff1@roeck-us.net/
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Fixes: 931adff314
("target/hppa: Update cpu_hppa_get/put_psw for hppa64")
Cc: qemu-stable@nongnu.org # v8.2+
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@ -211,7 +211,7 @@ typedef struct CPUArchState {
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uint32_t psw; /* All psw bits except the following: */
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uint32_t psw_xb; /* X and B, in their normal positions */
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target_ulong psw_n; /* boolean */
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target_long psw_v; /* in most significant bit */
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target_long psw_v; /* in bit 31 */
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/* Splitting the carry-borrow field into the MSB and "the rest", allows
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* for "the rest" to be deleted when it is unused, but the MSB is in use.
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@ -53,7 +53,7 @@ target_ulong cpu_hppa_get_psw(CPUHPPAState *env)
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}
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psw |= env->psw_n * PSW_N;
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psw |= (env->psw_v < 0) * PSW_V;
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psw |= ((env->psw_v >> 31) & 1) * PSW_V;
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psw |= env->psw | env->psw_xb;
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return psw;
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