target/arm: Inline gen_bx_im into callers
There are only two remaining uses of gen_bx_im. In each case, we know the destination mode -- not changing in the case of gen_jmp or changing in the case of trans_BLX_i. Use this to simplify the surrounding code. For trans_BLX_i, use gen_jmp for the actual branch. For gen_jmp, use gen_set_pc_im to set up the single-step. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190904193059.26202-70-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -765,21 +765,6 @@ static inline void gen_set_pc_im(DisasContext *s, target_ulong val)
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tcg_gen_movi_i32(cpu_R[15], val);
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}
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/* Set PC and Thumb state from an immediate address. */
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static inline void gen_bx_im(DisasContext *s, uint32_t addr)
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{
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TCGv_i32 tmp;
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s->base.is_jmp = DISAS_JUMP;
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if (s->thumb != (addr & 1)) {
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tmp = tcg_temp_new_i32();
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tcg_gen_movi_i32(tmp, addr & 1);
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tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUARMState, thumb));
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tcg_temp_free_i32(tmp);
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}
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tcg_gen_movi_i32(cpu_R[15], addr & ~1);
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}
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/* Set PC and Thumb state from var. var is marked as dead. */
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static inline void gen_bx(DisasContext *s, TCGv_i32 var)
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{
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@ -2725,9 +2710,8 @@ static inline void gen_jmp (DisasContext *s, uint32_t dest)
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{
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if (unlikely(is_singlestepping(s))) {
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/* An indirect jump so that we still trigger the debug exception. */
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if (s->thumb)
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dest |= 1;
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gen_bx_im(s, dest);
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gen_set_pc_im(s, dest);
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s->base.is_jmp = DISAS_JUMP;
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} else {
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gen_goto_tb(s, 0, dest);
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}
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@ -10138,12 +10122,16 @@ static bool trans_BL(DisasContext *s, arg_i *a)
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static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a)
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{
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TCGv_i32 tmp;
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/* For A32, ARCH(5) is checked near the start of the uncond block. */
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if (s->thumb && (a->imm & 2)) {
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return false;
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}
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tcg_gen_movi_i32(cpu_R[14], s->base.pc_next | s->thumb);
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gen_bx_im(s, (read_pc(s) & ~3) + a->imm + !s->thumb);
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tmp = tcg_const_i32(!s->thumb);
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store_cpu_field(tmp, thumb);
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gen_jmp(s, (read_pc(s) & ~3) + a->imm);
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return true;
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}
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