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target-i386: raise page fault for reserved bits in large pages

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In large pages, bit 12 is for PAT, but bits starting at 13 are reserved.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2014-05-27 13:03:17 +02:00
parent e2a32ebbfe
commit eaad03e472
2 changed files with 3 additions and 0 deletions
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2
target-i386/cpu.h
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@ -249,6 +249,7 @@
#define PG_DIRTY_BIT 6 #define PG_DIRTY_BIT 6
#define PG_PSE_BIT 7 #define PG_PSE_BIT 7
#define PG_GLOBAL_BIT 8 #define PG_GLOBAL_BIT 8
#define PG_PSE_PAT_BIT 12
#define PG_NX_BIT 63 #define PG_NX_BIT 63
#define PG_PRESENT_MASK (1 << PG_PRESENT_BIT) #define PG_PRESENT_MASK (1 << PG_PRESENT_BIT)
@ -260,6 +261,7 @@
#define PG_DIRTY_MASK (1 << PG_DIRTY_BIT) #define PG_DIRTY_MASK (1 << PG_DIRTY_BIT)
#define PG_PSE_MASK (1 << PG_PSE_BIT) #define PG_PSE_MASK (1 << PG_PSE_BIT)
#define PG_GLOBAL_MASK (1 << PG_GLOBAL_BIT) #define PG_GLOBAL_MASK (1 << PG_GLOBAL_BIT)
#define PG_PSE_PAT_MASK (1 << PG_PSE_PAT_BIT)
#define PG_ADDRESS_MASK 0x000ffffffffff000LL #define PG_ADDRESS_MASK 0x000ffffffffff000LL
#define PG_HI_RSVD_MASK (PG_ADDRESS_MASK & ~PHYS_ADDR_MASK) #define PG_HI_RSVD_MASK (PG_ADDRESS_MASK & ~PHYS_ADDR_MASK)
#define PG_HI_USER_MASK 0x7ff0000000000000LL #define PG_HI_USER_MASK 0x7ff0000000000000LL

1
target-i386/helper.c
View File

@ -695,6 +695,7 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
} }
do_check_protect: do_check_protect:
rsvd_mask |= (page_size - 1) & PG_ADDRESS_MASK & ~PG_PSE_PAT_MASK;
if (pte & rsvd_mask) { if (pte & rsvd_mask) {
goto do_fault_rsvd; goto do_fault_rsvd;
} }