From e9ebfbfcf31c11fb3bd2fc436fa17ce45a4e7086 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 7 Sep 2015 10:39:28 +0100 Subject: [PATCH] target-arm/arm-semi.c: Implement A64 specific SyncCacheRange call The A64 semihosting ABI defines a new call SyncCacheRange for doing a 'clean D-cache and invalidate I-cache' sequence. Since QEMU doesn't implement caches, we can implement this as a nop. Signed-off-by: Peter Maydell Reviewed-by: Christopher Covington Tested-by: Christopher Covington Message-id: 1439483745-28752-8-git-send-email-peter.maydell@linaro.org --- target-arm/arm-semi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target-arm/arm-semi.c b/target-arm/arm-semi.c index 1d4cc59e79..1d0d7aa32b 100644 --- a/target-arm/arm-semi.c +++ b/target-arm/arm-semi.c @@ -58,6 +58,7 @@ #define TARGET_SYS_GET_CMDLINE 0x15 #define TARGET_SYS_HEAPINFO 0x16 #define TARGET_SYS_EXIT 0x18 +#define TARGET_SYS_SYNCCACHE 0x19 /* ADP_Stopped_ApplicationExit is used for exit(0), * anything else is implemented as exit(1) */ @@ -623,6 +624,15 @@ target_ulong do_arm_semihosting(CPUARMState *env) ret = (args == ADP_Stopped_ApplicationExit) ? 0 : 1; gdb_exit(env, ret); exit(ret); + case TARGET_SYS_SYNCCACHE: + /* Clean the D-cache and invalidate the I-cache for the specified + * virtual address range. This is a nop for us since we don't + * implement caches. This is only present on A64. + */ + if (is_a64(env)) { + return 0; + } + /* fall through -- invalid for A32/T32 */ default: fprintf(stderr, "qemu: Unsupported SemiHosting SWI 0x%02x\n", nr); cpu_dump_state(cs, stderr, fprintf, 0);