ppc/ppc405: Use an embedded PPCUIC model in SoC state
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> [balaton: Simplify sysbus device casts for readability] Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <ac5f010f4eb3ade061c65bc39a049f231f75574a.1660746880.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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@ -27,6 +27,7 @@
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#include "qom/object.h"
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#include "hw/ppc/ppc4xx.h"
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#include "hw/intc/ppc-uic.h"
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#define PPC405EP_SDRAM_BASE 0x00000000
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#define PPC405EP_NVRAM_BASE 0xF0000000
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@ -208,7 +209,7 @@ struct Ppc405SoCState {
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hwaddr ram_size;
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PowerPCCPU cpu;
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DeviceState *uic;
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PPCUIC uic;
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Ppc405CpcState cpc;
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Ppc405GptState gpt;
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Ppc405OcmState ocm;
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@ -1083,6 +1083,8 @@ static void ppc405_soc_instance_init(Object *obj)
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object_initialize_child(obj, "cpu", &s->cpu,
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POWERPC_CPU_TYPE_NAME("405ep"));
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object_initialize_child(obj, "uic", &s->uic, TYPE_PPC_UIC);
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object_initialize_child(obj, "cpc", &s->cpc, TYPE_PPC405_CPC);
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object_property_add_alias(obj, "sys-clk", OBJECT(&s->cpc), "sys-clk");
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@ -1150,17 +1152,15 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(sbd, 0, 0xef600600);
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/* Universal interrupt controller */
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s->uic = qdev_new(TYPE_PPC_UIC);
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object_property_set_link(OBJECT(s->uic), "cpu", OBJECT(&s->cpu),
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object_property_set_link(OBJECT(&s->uic), "cpu", OBJECT(&s->cpu),
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&error_fatal);
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if (!sysbus_realize(SYS_BUS_DEVICE(s->uic), errp)) {
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sbd = SYS_BUS_DEVICE(&s->uic);
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if (!sysbus_realize(sbd, errp)) {
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return;
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}
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sysbus_connect_irq(SYS_BUS_DEVICE(s->uic), PPCUIC_OUTPUT_INT,
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sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
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qdev_get_gpio_in(DEVICE(&s->cpu), PPC40x_INPUT_INT));
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sysbus_connect_irq(SYS_BUS_DEVICE(s->uic), PPCUIC_OUTPUT_CINT,
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sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT,
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qdev_get_gpio_in(DEVICE(&s->cpu), PPC40x_INPUT_CINT));
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/* SDRAM controller */
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@ -1171,7 +1171,7 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
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"ppc405.sdram0", s->dram_mr,
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s->ram_bases[0], s->ram_sizes[0]);
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ppc4xx_sdram_init(env, qdev_get_gpio_in(s->uic, 17), 1,
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ppc4xx_sdram_init(env, qdev_get_gpio_in(DEVICE(&s->uic), 17), 1,
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s->ram_banks, s->ram_bases, s->ram_sizes,
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s->do_dram_init);
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@ -1186,12 +1186,12 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
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}
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sbd = SYS_BUS_DEVICE(&s->dma);
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for (i = 0; i < ARRAY_SIZE(s->dma.irqs); i++) {
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sysbus_connect_irq(sbd, i, qdev_get_gpio_in(s->uic, 5 + i));
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sysbus_connect_irq(sbd, i, qdev_get_gpio_in(DEVICE(&s->uic), 5 + i));
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}
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/* I2C controller */
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sysbus_create_simple(TYPE_PPC4xx_I2C, 0xef600500,
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qdev_get_gpio_in(s->uic, 2));
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qdev_get_gpio_in(DEVICE(&s->uic), 2));
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/* GPIO */
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sbd = SYS_BUS_DEVICE(&s->gpio);
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@ -1203,13 +1203,13 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
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/* Serial ports */
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if (serial_hd(0) != NULL) {
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serial_mm_init(get_system_memory(), 0xef600300, 0,
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qdev_get_gpio_in(s->uic, 0),
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qdev_get_gpio_in(DEVICE(&s->uic), 0),
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PPC_SERIAL_MM_BAUDBASE, serial_hd(0),
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DEVICE_BIG_ENDIAN);
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}
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if (serial_hd(1) != NULL) {
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serial_mm_init(get_system_memory(), 0xef600400, 0,
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qdev_get_gpio_in(s->uic, 1),
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qdev_get_gpio_in(DEVICE(&s->uic), 1),
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PPC_SERIAL_MM_BAUDBASE, serial_hd(1),
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DEVICE_BIG_ENDIAN);
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}
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@ -1226,7 +1226,7 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
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}
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sysbus_mmio_map(sbd, 0, 0xef600000);
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for (i = 0; i < ARRAY_SIZE(s->gpt.irqs); i++) {
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sysbus_connect_irq(sbd, i, qdev_get_gpio_in(s->uic, 19 + i));
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sysbus_connect_irq(sbd, i, qdev_get_gpio_in(DEVICE(&s->uic), 19 + i));
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}
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/* MAL */
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@ -1237,7 +1237,7 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
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}
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sbd = SYS_BUS_DEVICE(&s->mal);
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for (i = 0; i < ARRAY_SIZE(s->mal.irqs); i++) {
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sysbus_connect_irq(sbd, i, qdev_get_gpio_in(s->uic, 11 + i));
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sysbus_connect_irq(sbd, i, qdev_get_gpio_in(DEVICE(&s->uic), 11 + i));
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}
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/* Ethernet */
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