target/mips: Factor mo_endian_rev() out of MXU code
Instead of swapping the reversed target endianness using MO_BSWAP, directly return the correct endianness. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010215015.44326-7-philmd@linaro.org>
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@ -1533,7 +1533,7 @@ static void gen_mxu_s32ldxx(DisasContext *ctx, bool reversed, bool postinc)
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tcg_gen_add_tl(t0, t0, t1);
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tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx,
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(MO_TESL ^ (reversed ? MO_BSWAP : 0)) |
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MO_SL | mo_endian_rev(ctx, reversed) |
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ctx->default_tcg_memop_mask);
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gen_store_mxu_gpr(t1, XRa);
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@ -1569,7 +1569,7 @@ static void gen_mxu_s32stxx(DisasContext *ctx, bool reversed, bool postinc)
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gen_load_mxu_gpr(t1, XRa);
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tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx,
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(MO_TESL ^ (reversed ? MO_BSWAP : 0)) |
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MO_SL | mo_endian_rev(ctx, reversed) |
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ctx->default_tcg_memop_mask);
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if (postinc) {
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@ -1605,7 +1605,7 @@ static void gen_mxu_s32ldxvx(DisasContext *ctx, bool reversed,
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tcg_gen_add_tl(t0, t0, t1);
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tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx,
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(MO_TESL ^ (reversed ? MO_BSWAP : 0)) |
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MO_SL | mo_endian_rev(ctx, reversed) |
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ctx->default_tcg_memop_mask);
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gen_store_mxu_gpr(t1, XRa);
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@ -1675,7 +1675,7 @@ static void gen_mxu_s32stxvx(DisasContext *ctx, bool reversed,
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gen_load_mxu_gpr(t1, XRa);
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tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx,
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(MO_TESL ^ (reversed ? MO_BSWAP : 0)) |
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MO_SL | mo_endian_rev(ctx, reversed) |
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ctx->default_tcg_memop_mask);
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if (postinc) {
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@ -240,4 +240,9 @@ static inline bool disas_is_bigendian(DisasContext *ctx)
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return extract32(ctx->CP0_Config0, CP0C0_BE, 1);
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}
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static inline MemOp mo_endian_rev(DisasContext *dc, bool reversed)
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{
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return disas_is_bigendian(dc) ^ reversed ? MO_BE : MO_LE;
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}
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#endif
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