mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

tcg/optimize: Split out fold_xi_to_i

Browse Source 
Pull the "op r, a, 0 => movi r, 0" optimization into a function,
and use it in the outer opcode fold functions.

Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-08-25 13:19:52 -07:00
parent ca7bb049a0
commit e8679955ec
1 changed files with 20 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
tcg/optimize.c
View File

@ -695,6 +695,15 @@ static bool fold_const2(OptContext *ctx, TCGOp *op)
return false;
}
/* If the binary operation has second argument @i, fold to @i. */
static bool fold_xi_to_i(OptContext *ctx, TCGOp *op, uint64_t i)
{
if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == i) {
return tcg_opt_gen_movi(ctx, op, op->args[0], i);
}
return false;
}
/* If the binary operation has both arguments equal, fold to @i. */
static bool fold_xx_to_i(OptContext *ctx, TCGOp *op, uint64_t i)
{
@ -763,6 +772,7 @@ static bool fold_add2_i32(OptContext *ctx, TCGOp *op)
static bool fold_and(OptContext *ctx, TCGOp *op)
{
if (fold_const2(ctx, op) ||
fold_xi_to_i(ctx, op, 0) ||
fold_xx_to_x(ctx, op)) {
return true;
}
@ -1081,12 +1091,20 @@ static bool fold_movcond(OptContext *ctx, TCGOp *op)
static bool fold_mul(OptContext *ctx, TCGOp *op)
{
return fold_const2(ctx, op);
if (fold_const2(ctx, op) ||
fold_xi_to_i(ctx, op, 0)) {
return true;
}
return false;
}
static bool fold_mul_highpart(OptContext *ctx, TCGOp *op)
{
return fold_const2(ctx, op);
if (fold_const2(ctx, op) ||
fold_xi_to_i(ctx, op, 0)) {
return true;
}
return false;
}
static bool fold_mulu2_i32(OptContext *ctx, TCGOp *op)
@ -1753,22 +1771,6 @@ void tcg_optimize(TCGContext *s)
continue;
}
/* Simplify expression for "op r, a, 0 => movi r, 0" cases */
switch (opc) {
CASE_OP_32_64_VEC(and):
CASE_OP_32_64_VEC(mul):
CASE_OP_32_64(muluh):
CASE_OP_32_64(mulsh):
if (arg_is_const(op->args[2])
&& arg_info(op->args[2])->val == 0) {
tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
continue;
}
break;
default:
break;
}
/*
* Process each opcode.
* Sorted alphabetically by opcode as much as possible.