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target-sparc: Revert setting cpu_dst to gen_dest_gpr

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There is some read-after-write error within the OP=2 insns which
prevents setting cpu_dst to the real output register.  Until this
is found and fixed, always write to a temporary first.

Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Richard Henderson 2012-10-29 15:50:20 +11:00 committed by Blue Swirl
parent 742a40229d
commit e7d51b3450
1 changed files with 1 additions and 1 deletions
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target-sparc/translate.c
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@ -2633,7 +2633,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
case 2: /* FPU & Logical Operations */
{
unsigned int xop = GET_FIELD(insn, 7, 12);
TCGv cpu_dst = gen_dest_gpr(dc, rd);
TCGv cpu_dst = get_temp_tl(dc);
TCGv cpu_tmp0;
if (xop == 0x3a) { /* generate trap */