ARM half word load/store fix (Ulrich Hecht)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@438 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -546,7 +546,6 @@ static void disas_arm_insn(DisasContext *s)
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rn = (insn >> 16) & 0xf;
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rd = (insn >> 12) & 0xf;
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gen_movl_T1_reg(s, rn);
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if (insn & (1 << 25))
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gen_add_datah_offset(s, insn);
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if (insn & (1 << 20)) {
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/* load */
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@ -562,8 +561,10 @@ static void disas_arm_insn(DisasContext *s)
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gen_op_ldsw_T0_T1();
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break;
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}
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gen_movl_reg_T0(s, rd);
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} else {
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/* store */
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gen_movl_T0_reg(s, rd);
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gen_op_stw_T0_T1();
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}
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if (!(insn & (1 << 24))) {
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