i2c: pm_smbus: Add interrupt handling
Add the necessary code so that interrupts actually work from the pm_smbus device. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1534796770-10295-7-git-send-email-minyard@acm.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -214,6 +214,12 @@ static void smb_transaction_start(PMSMBus *s)
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s->smb_stat |= STS_HOST_BUSY;
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}
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static bool
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smb_irq_value(PMSMBus *s)
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{
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return ((s->smb_stat & ~STS_HOST_BUSY) != 0) && (s->smb_ctl & CTL_INTREN);
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}
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static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
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unsigned width)
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{
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@ -309,7 +315,9 @@ static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
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}
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out:
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return;
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if (s->set_irq) {
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s->set_irq(s, smb_irq_value(s));
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}
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}
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static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width)
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@ -365,6 +373,10 @@ static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width)
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SMBUS_DPRINTF("SMB readb port=0x%04" HWADDR_PRIx " val=0x%02x\n",
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addr, val);
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if (s->set_irq) {
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s->set_irq(s, smb_irq_value(s));
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}
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return val;
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}
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@ -40,6 +40,8 @@
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typedef struct ICH9SMBState {
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PCIDevice dev;
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bool irq_enabled;
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PMSMBus smb;
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} ICH9SMBState;
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@ -109,11 +111,25 @@ static void ich9_smb_class_init(ObjectClass *klass, void *data)
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dc->user_creatable = false;
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}
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static void ich9_smb_set_irq(PMSMBus *pmsmb, bool enabled)
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{
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ICH9SMBState *s = pmsmb->opaque;
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if (enabled == s->irq_enabled) {
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return;
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}
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s->irq_enabled = enabled;
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pci_set_irq(&s->dev, enabled);
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}
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I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
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{
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PCIDevice *d =
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pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE);
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ICH9SMBState *s = ICH9_SMB_DEVICE(d);
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s->smb.set_irq = ich9_smb_set_irq;
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s->smb.opaque = s;
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return s->smb.smbus;
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}
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@ -23,6 +23,8 @@ typedef struct PMSMBus {
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/* Set by the user. */
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bool i2c_enable;
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void (*set_irq)(struct PMSMBus *s, bool enabled);
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void *opaque;
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/* Internally used by pm_smbus. */
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