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target-mips: fix bad shifts in {dextp|dextpdp}

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Fixed issues in the MIPSDSP64 instructions dextp and dextpdp.
Shifting can go out of 32 bit range.

https://bugs.launchpad.net/qemu/+bug/1631625

Reported-by: Thomas Huth <thuth@redhat.com>
Reported-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Yongbok Kim 2016-11-30 15:25:04 +00:00
parent b5a587b613
commit e6e2784cac
1 changed files with 2 additions and 2 deletions
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4
target-mips/dsp_helper.c
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@ -3477,7 +3477,7 @@ target_ulong helper_dextp(target_ulong ac, target_ulong size, CPUMIPSState *env)
if (sub >= -1) {
temp = (tempB << (64 - len)) | (tempA >> len);
temp = temp & ((0x01 << (size + 1)) - 1);
temp = temp & ((1ULL << (size + 1)) - 1);
set_DSPControl_efi(0, env);
} else {
set_DSPControl_efi(1, env);
@ -3506,7 +3506,7 @@ target_ulong helper_dextpdp(target_ulong ac, target_ulong size,
if (sub >= -1) {
temp = (tempB << (64 - len)) | (tempA >> len);
temp = temp & ((0x01 << (size + 1)) - 1);
temp = temp & ((1ULL << (size + 1)) - 1);
set_DSPControl_pos(sub, env);
set_DSPControl_efi(0, env);
} else {