From e6b4e5f4795b2591fd91bea671e3e22e08fd0e75 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Fri, 7 Nov 2014 17:07:03 +0100 Subject: [PATCH] PPC: e500: Move CCSR and MMIO space to upper end of address space On e500 we're basically guaranteed to have 36bits of physical address space available for our enjoyment. Older chips (like the mpc8544) only had 32bits, but everything from e500v2 onwards bumped it up. It's reasonably safe to assume that if you're using the PV machine, your guest kernel is configured to support 36bit physical address space. So in order to support more guest RAM, we can move CCSR and other MMIO windows right below the end of our 36bit address space, just like later SoC versions of e500 do. With this patch, I'm able to successfully spawn an e500 VM with -m 48G. Signed-off-by: Alexander Graf --- hw/ppc/e500plat.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c index 1600fcf219..1b8a68d223 100644 --- a/hw/ppc/e500plat.c +++ b/hw/ppc/e500plat.c @@ -41,9 +41,9 @@ static void e500plat_init(MachineState *machine) .platform_bus_size = (128ULL * 1024 * 1024), .platform_bus_first_irq = 5, .platform_bus_num_irqs = 10, - .ccsrbar_base = 0xE0000000ULL, - .pci_pio_base = 0xE1000000ULL, - .spin_base = 0xEF000000ULL, + .ccsrbar_base = 0xFE0000000ULL, + .pci_pio_base = 0xFE1000000ULL, + .spin_base = 0xFEF000000ULL, }; /* Older KVM versions don't support EPR which breaks guests when we announce