accel/tcg: Remove CPUState.icount_decr_ptr
We can now access icount_decr directly. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -86,7 +86,7 @@ void cpu_exit(CPUState *cpu)
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qatomic_set(&cpu->exit_request, 1);
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/* Ensure cpu_exec will see the exit request after TCG has exited. */
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smp_wmb();
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qatomic_set(&cpu->icount_decr_ptr->u16.high, -1);
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qatomic_set(&cpu->neg.icount_decr.u16.high, -1);
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}
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static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
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@ -130,7 +130,7 @@ static void cpu_common_reset_hold(Object *obj)
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cpu->halted = cpu->start_powered_off;
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cpu->mem_io_pc = 0;
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cpu->icount_extra = 0;
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qatomic_set(&cpu->icount_decr_ptr->u32, 0);
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qatomic_set(&cpu->neg.icount_decr.u32, 0);
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cpu->can_do_io = 1;
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cpu->exception_index = -1;
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cpu->crash_occurred = false;
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@ -432,7 +432,6 @@ int cpu_exec(CPUState *cpu);
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static inline void cpu_set_cpustate_pointers(ArchCPU *cpu)
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{
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cpu->parent_obj.env_ptr = &cpu->env;
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cpu->parent_obj.icount_decr_ptr = &cpu->parent_obj.neg.icount_decr;
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}
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/* Validate correct placement of CPUArchState. */
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@ -429,7 +429,6 @@ struct qemu_work_item;
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* @as: Pointer to the first AddressSpace, for the convenience of targets which
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* only have a single AddressSpace
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* @env_ptr: Pointer to subclass-specific CPUArchState field.
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* @icount_decr_ptr: Pointer to IcountDecr field within subclass.
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* @gdb_regs: Additional GDB registers.
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* @gdb_num_regs: Number of total registers accessible to GDB.
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* @gdb_num_g_regs: Number of registers in GDB 'g' packets.
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@ -504,7 +503,6 @@ struct CPUState {
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MemoryRegion *memory;
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CPUArchState *env_ptr;
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IcountDecr *icount_decr_ptr;
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CPUJumpCache *tb_jmp_cache;
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