tcg: Make some tcg-target.c routines static.

Both tcg_target_init and tcg_target_qemu_prologue
are unused outside of tcg.c.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2010-06-02 17:26:56 -07:00 committed by Aurelien Jarno
parent 3b6dac3416
commit e4d58b41f9
12 changed files with 22 additions and 23 deletions

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@ -1746,7 +1746,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
{ -1 }, { -1 },
}; };
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
/* fail safe */ /* fail safe */
@ -1809,7 +1809,7 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type,
tcg_out_movi32(s, COND_AL, ret, arg); tcg_out_movi32(s, COND_AL, ret, arg);
} }
void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_qemu_prologue(TCGContext *s)
{ {
/* There is no need to save r7, it is used to store the address /* There is no need to save r7, it is used to store the address
of the env structure and is not modified by GCC. */ of the env structure and is not modified by GCC. */

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@ -1600,7 +1600,7 @@ static int tcg_target_callee_save_regs[] = {
TCG_REG_R18 TCG_REG_R18
}; };
void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_qemu_prologue(TCGContext *s)
{ {
int frame_size, i; int frame_size, i;
@ -1652,7 +1652,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
TCG_REG_SP, -frame_size, INSN_LDWM); TCG_REG_SP, -frame_size, INSN_LDWM);
} }
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);

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@ -1430,7 +1430,7 @@ static int tcg_target_callee_save_regs[] = {
}; };
/* Generate global QEMU prologue and epilogue code */ /* Generate global QEMU prologue and epilogue code */
void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_qemu_prologue(TCGContext *s)
{ {
int i, frame_size, push_size, stack_addend; int i, frame_size, push_size, stack_addend;
@ -1458,7 +1458,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_opc(s, OPC_RET); tcg_out_opc(s, OPC_RET);
} }
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
/* fail safe */ /* fail safe */

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@ -2266,7 +2266,7 @@ static const TCGTargetOpDef ia64_op_defs[] = {
}; };
/* Generate global QEMU prologue and epilogue code */ /* Generate global QEMU prologue and epilogue code */
void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_qemu_prologue(TCGContext *s)
{ {
int frame_size; int frame_size;
@ -2321,7 +2321,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
TCG_REG_B0)); TCG_REG_B0));
} }
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32],
0xffffffffffffffffull); 0xffffffffffffffffull);

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@ -1466,7 +1466,7 @@ static int tcg_target_callee_save_regs[] = {
}; };
/* Generate global QEMU prologue and epilogue code */ /* Generate global QEMU prologue and epilogue code */
void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_qemu_prologue(TCGContext *s)
{ {
int i, frame_size; int i, frame_size;
@ -1498,7 +1498,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_addi(s, TCG_REG_SP, frame_size); tcg_out_addi(s, TCG_REG_SP, frame_size);
} }
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff); tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff);
tcg_regset_set(tcg_target_call_clobber_regs, tcg_regset_set(tcg_target_call_clobber_regs,

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@ -900,7 +900,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
#endif #endif
} }
void tcg_target_qemu_prologue (TCGContext *s) static void tcg_target_qemu_prologue (TCGContext *s)
{ {
int i, frame_size; int i, frame_size;
@ -1885,7 +1885,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ -1 }, { -1 },
}; };
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
tcg_regset_set32(tcg_target_call_clobber_regs, 0, tcg_regset_set32(tcg_target_call_clobber_regs, 0,

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@ -860,7 +860,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
#endif #endif
} }
void tcg_target_qemu_prologue (TCGContext *s) static void tcg_target_qemu_prologue (TCGContext *s)
{ {
int i, frame_size; int i, frame_size;
#ifndef __APPLE__ #ifndef __APPLE__
@ -1663,7 +1663,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ -1 }, { -1 },
}; };
void tcg_target_init (TCGContext *s) static void tcg_target_init (TCGContext *s)
{ {
tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff); tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);

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@ -84,12 +84,12 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_abort(); tcg_abort();
} }
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
/* gets called with KVM */ /* gets called with KVM */
} }
void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_qemu_prologue(TCGContext *s)
{ {
/* gets called with KVM */ /* gets called with KVM */
} }

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@ -691,7 +691,7 @@ static void tcg_out_setcond2_i32(TCGContext *s, TCGCond cond, TCGArg ret,
#endif #endif
/* Generate global QEMU prologue and epilogue code */ /* Generate global QEMU prologue and epilogue code */
void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_qemu_prologue(TCGContext *s)
{ {
tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) | tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) |
INSN_IMM13(-TCG_TARGET_STACK_MINFRAME)); INSN_IMM13(-TCG_TARGET_STACK_MINFRAME));
@ -1533,7 +1533,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ -1 }, { -1 },
}; };
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
#if TCG_TARGET_REG_BITS == 64 #if TCG_TARGET_REG_BITS == 64

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@ -63,6 +63,8 @@
#error GUEST_BASE not supported on this host. #error GUEST_BASE not supported on this host.
#endif #endif
static void tcg_target_init(TCGContext *s);
static void tcg_target_qemu_prologue(TCGContext *s);
static void patch_reloc(uint8_t *code_ptr, int type, static void patch_reloc(uint8_t *code_ptr, int type,
tcg_target_long value, tcg_target_long addend); tcg_target_long value, tcg_target_long addend);

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@ -435,9 +435,6 @@ typedef struct TCGTargetOpDef {
const char *args_ct_str[TCG_MAX_OP_ARGS]; const char *args_ct_str[TCG_MAX_OP_ARGS];
} TCGTargetOpDef; } TCGTargetOpDef;
void tcg_target_init(TCGContext *s);
void tcg_target_qemu_prologue(TCGContext *s);
#define tcg_abort() \ #define tcg_abort() \
do {\ do {\
fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\ fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\

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@ -1279,7 +1279,7 @@ static inline void tcg_out_pop(TCGContext *s, int reg)
} }
/* Generate global QEMU prologue and epilogue code */ /* Generate global QEMU prologue and epilogue code */
void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_qemu_prologue(TCGContext *s)
{ {
int i, frame_size, push_size, stack_addend; int i, frame_size, push_size, stack_addend;
@ -1417,7 +1417,7 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
{ -1 }, { -1 },
}; };
void tcg_target_init(TCGContext *s) static void tcg_target_init(TCGContext *s)
{ {
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
/* fail safe */ /* fail safe */