target-ppc: Compute mullwo without branches
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -1036,35 +1036,21 @@ static void gen_mullw(DisasContext *ctx)
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/* mullwo mullwo. */
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static void gen_mullwo(DisasContext *ctx)
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{
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int l1;
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TCGv_i64 t0, t1;
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TCGv_i32 t0 = tcg_temp_new_i32();
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TCGv_i32 t1 = tcg_temp_new_i32();
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t0 = tcg_temp_new_i64();
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t1 = tcg_temp_new_i64();
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l1 = gen_new_label();
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/* Start with XER OV disabled, the most likely case */
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tcg_gen_movi_tl(cpu_ov, 0);
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#if defined(TARGET_PPC64)
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tcg_gen_ext32s_i64(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_ext32s_i64(t1, cpu_gpr[rB(ctx->opcode)]);
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#else
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tcg_gen_ext_tl_i64(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_ext_tl_i64(t1, cpu_gpr[rB(ctx->opcode)]);
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#endif
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tcg_gen_mul_i64(t0, t0, t1);
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#if defined(TARGET_PPC64)
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tcg_gen_ext32s_i64(cpu_gpr[rD(ctx->opcode)], t0);
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tcg_gen_brcond_i64(TCG_COND_EQ, t0, cpu_gpr[rD(ctx->opcode)], l1);
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#else
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tcg_gen_trunc_i64_tl(cpu_gpr[rD(ctx->opcode)], t0);
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tcg_gen_ext32s_i64(t1, t0);
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tcg_gen_brcond_i64(TCG_COND_EQ, t0, t1, l1);
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#endif
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tcg_gen_movi_tl(cpu_ov, 1);
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tcg_gen_movi_tl(cpu_so, 1);
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gen_set_label(l1);
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tcg_temp_free_i64(t0);
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tcg_temp_free_i64(t1);
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tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]);
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tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]);
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tcg_gen_muls2_i32(t0, t1, t0, t1);
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tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0);
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tcg_gen_sari_i32(t0, t0, 31);
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tcg_gen_setcond_i32(TCG_COND_NE, t0, t0, t1);
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tcg_gen_extu_i32_tl(cpu_ov, t0);
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tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
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tcg_temp_free_i32(t0);
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tcg_temp_free_i32(t1);
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if (unlikely(Rc(ctx->opcode) != 0))
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gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
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}
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