e1000: port to vmstate
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Juan Quintela
Anthony Liguori
parent
28366c3ac5
commit
e482dc3eaa
244
hw/e1000.c
244
hw/e1000.c
@ -881,169 +881,88 @@ e1000_mmio_readw(void *opaque, target_phys_addr_t addr)
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(8 * (addr & 3))) & 0xffff;
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}
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static void
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nic_save(QEMUFile *f, void *opaque)
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static bool is_version_1(void *opaque, int version_id)
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{
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E1000State *s = opaque;
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int i;
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pci_device_save(&s->dev, f);
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qemu_put_be32(f, 0);
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qemu_put_be32s(f, &s->rxbuf_size);
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qemu_put_be32s(f, &s->rxbuf_min_shift);
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qemu_put_be32s(f, &s->eecd_state.val_in);
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qemu_put_be16s(f, &s->eecd_state.bitnum_in);
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qemu_put_be16s(f, &s->eecd_state.bitnum_out);
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qemu_put_be16s(f, &s->eecd_state.reading);
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qemu_put_be32s(f, &s->eecd_state.old_eecd);
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qemu_put_8s(f, &s->tx.ipcss);
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qemu_put_8s(f, &s->tx.ipcso);
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qemu_put_be16s(f, &s->tx.ipcse);
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qemu_put_8s(f, &s->tx.tucss);
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qemu_put_8s(f, &s->tx.tucso);
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qemu_put_be16s(f, &s->tx.tucse);
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qemu_put_be32s(f, &s->tx.paylen);
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qemu_put_8s(f, &s->tx.hdr_len);
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qemu_put_be16s(f, &s->tx.mss);
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qemu_put_be16s(f, &s->tx.size);
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qemu_put_be16s(f, &s->tx.tso_frames);
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qemu_put_8s(f, &s->tx.sum_needed);
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qemu_put_s8s(f, &s->tx.ip);
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qemu_put_s8s(f, &s->tx.tcp);
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qemu_put_buffer(f, s->tx.header, sizeof s->tx.header);
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qemu_put_buffer(f, s->tx.data, sizeof s->tx.data);
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for (i = 0; i < 64; i++)
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qemu_put_be16s(f, s->eeprom_data + i);
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for (i = 0; i < 0x20; i++)
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qemu_put_be16s(f, s->phy_reg + i);
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qemu_put_be32s(f, &s->mac_reg[CTRL]);
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qemu_put_be32s(f, &s->mac_reg[EECD]);
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qemu_put_be32s(f, &s->mac_reg[EERD]);
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qemu_put_be32s(f, &s->mac_reg[GPRC]);
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qemu_put_be32s(f, &s->mac_reg[GPTC]);
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qemu_put_be32s(f, &s->mac_reg[ICR]);
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qemu_put_be32s(f, &s->mac_reg[ICS]);
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qemu_put_be32s(f, &s->mac_reg[IMC]);
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qemu_put_be32s(f, &s->mac_reg[IMS]);
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qemu_put_be32s(f, &s->mac_reg[LEDCTL]);
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qemu_put_be32s(f, &s->mac_reg[MANC]);
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qemu_put_be32s(f, &s->mac_reg[MDIC]);
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qemu_put_be32s(f, &s->mac_reg[MPC]);
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qemu_put_be32s(f, &s->mac_reg[PBA]);
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qemu_put_be32s(f, &s->mac_reg[RCTL]);
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qemu_put_be32s(f, &s->mac_reg[RDBAH]);
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qemu_put_be32s(f, &s->mac_reg[RDBAL]);
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qemu_put_be32s(f, &s->mac_reg[RDH]);
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qemu_put_be32s(f, &s->mac_reg[RDLEN]);
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qemu_put_be32s(f, &s->mac_reg[RDT]);
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qemu_put_be32s(f, &s->mac_reg[STATUS]);
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qemu_put_be32s(f, &s->mac_reg[SWSM]);
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qemu_put_be32s(f, &s->mac_reg[TCTL]);
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qemu_put_be32s(f, &s->mac_reg[TDBAH]);
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qemu_put_be32s(f, &s->mac_reg[TDBAL]);
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qemu_put_be32s(f, &s->mac_reg[TDH]);
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qemu_put_be32s(f, &s->mac_reg[TDLEN]);
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qemu_put_be32s(f, &s->mac_reg[TDT]);
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qemu_put_be32s(f, &s->mac_reg[TORH]);
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qemu_put_be32s(f, &s->mac_reg[TORL]);
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qemu_put_be32s(f, &s->mac_reg[TOTH]);
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qemu_put_be32s(f, &s->mac_reg[TOTL]);
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qemu_put_be32s(f, &s->mac_reg[TPR]);
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qemu_put_be32s(f, &s->mac_reg[TPT]);
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qemu_put_be32s(f, &s->mac_reg[TXDCTL]);
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qemu_put_be32s(f, &s->mac_reg[WUFC]);
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qemu_put_be32s(f, &s->mac_reg[VET]);
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for (i = RA; i < RA + 32; i++)
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qemu_put_be32s(f, &s->mac_reg[i]);
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for (i = MTA; i < MTA + 128; i++)
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qemu_put_be32s(f, &s->mac_reg[i]);
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for (i = VFTA; i < VFTA + 128; i++)
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qemu_put_be32s(f, &s->mac_reg[i]);
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return version_id == 1;
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}
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static int
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nic_load(QEMUFile *f, void *opaque, int version_id)
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{
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E1000State *s = opaque;
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int i, ret;
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if ((ret = pci_device_load(&s->dev, f)) < 0)
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return ret;
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if (version_id == 1)
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qemu_get_sbe32s(f, &i); /* once some unused instance id */
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qemu_get_be32(f); /* Ignored. Was mmio_base. */
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qemu_get_be32s(f, &s->rxbuf_size);
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qemu_get_be32s(f, &s->rxbuf_min_shift);
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qemu_get_be32s(f, &s->eecd_state.val_in);
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qemu_get_be16s(f, &s->eecd_state.bitnum_in);
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qemu_get_be16s(f, &s->eecd_state.bitnum_out);
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qemu_get_be16s(f, &s->eecd_state.reading);
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qemu_get_be32s(f, &s->eecd_state.old_eecd);
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qemu_get_8s(f, &s->tx.ipcss);
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qemu_get_8s(f, &s->tx.ipcso);
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qemu_get_be16s(f, &s->tx.ipcse);
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qemu_get_8s(f, &s->tx.tucss);
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qemu_get_8s(f, &s->tx.tucso);
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qemu_get_be16s(f, &s->tx.tucse);
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qemu_get_be32s(f, &s->tx.paylen);
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qemu_get_8s(f, &s->tx.hdr_len);
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qemu_get_be16s(f, &s->tx.mss);
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qemu_get_be16s(f, &s->tx.size);
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qemu_get_be16s(f, &s->tx.tso_frames);
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qemu_get_8s(f, &s->tx.sum_needed);
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qemu_get_s8s(f, &s->tx.ip);
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qemu_get_s8s(f, &s->tx.tcp);
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qemu_get_buffer(f, s->tx.header, sizeof s->tx.header);
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qemu_get_buffer(f, s->tx.data, sizeof s->tx.data);
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for (i = 0; i < 64; i++)
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qemu_get_be16s(f, s->eeprom_data + i);
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for (i = 0; i < 0x20; i++)
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qemu_get_be16s(f, s->phy_reg + i);
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qemu_get_be32s(f, &s->mac_reg[CTRL]);
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qemu_get_be32s(f, &s->mac_reg[EECD]);
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qemu_get_be32s(f, &s->mac_reg[EERD]);
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qemu_get_be32s(f, &s->mac_reg[GPRC]);
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qemu_get_be32s(f, &s->mac_reg[GPTC]);
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qemu_get_be32s(f, &s->mac_reg[ICR]);
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qemu_get_be32s(f, &s->mac_reg[ICS]);
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qemu_get_be32s(f, &s->mac_reg[IMC]);
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qemu_get_be32s(f, &s->mac_reg[IMS]);
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qemu_get_be32s(f, &s->mac_reg[LEDCTL]);
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qemu_get_be32s(f, &s->mac_reg[MANC]);
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qemu_get_be32s(f, &s->mac_reg[MDIC]);
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qemu_get_be32s(f, &s->mac_reg[MPC]);
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qemu_get_be32s(f, &s->mac_reg[PBA]);
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qemu_get_be32s(f, &s->mac_reg[RCTL]);
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qemu_get_be32s(f, &s->mac_reg[RDBAH]);
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qemu_get_be32s(f, &s->mac_reg[RDBAL]);
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qemu_get_be32s(f, &s->mac_reg[RDH]);
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qemu_get_be32s(f, &s->mac_reg[RDLEN]);
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qemu_get_be32s(f, &s->mac_reg[RDT]);
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qemu_get_be32s(f, &s->mac_reg[STATUS]);
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qemu_get_be32s(f, &s->mac_reg[SWSM]);
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qemu_get_be32s(f, &s->mac_reg[TCTL]);
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qemu_get_be32s(f, &s->mac_reg[TDBAH]);
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qemu_get_be32s(f, &s->mac_reg[TDBAL]);
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qemu_get_be32s(f, &s->mac_reg[TDH]);
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qemu_get_be32s(f, &s->mac_reg[TDLEN]);
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qemu_get_be32s(f, &s->mac_reg[TDT]);
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qemu_get_be32s(f, &s->mac_reg[TORH]);
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qemu_get_be32s(f, &s->mac_reg[TORL]);
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qemu_get_be32s(f, &s->mac_reg[TOTH]);
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qemu_get_be32s(f, &s->mac_reg[TOTL]);
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qemu_get_be32s(f, &s->mac_reg[TPR]);
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qemu_get_be32s(f, &s->mac_reg[TPT]);
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qemu_get_be32s(f, &s->mac_reg[TXDCTL]);
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qemu_get_be32s(f, &s->mac_reg[WUFC]);
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qemu_get_be32s(f, &s->mac_reg[VET]);
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for (i = RA; i < RA + 32; i++)
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qemu_get_be32s(f, &s->mac_reg[i]);
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for (i = MTA; i < MTA + 128; i++)
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qemu_get_be32s(f, &s->mac_reg[i]);
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for (i = VFTA; i < VFTA + 128; i++)
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qemu_get_be32s(f, &s->mac_reg[i]);
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return 0;
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}
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static const VMStateDescription vmstate_e1000 = {
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.name = "e1000",
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.version_id = 2,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_PCI_DEVICE(dev, E1000State),
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VMSTATE_UNUSED_TEST(is_version_1, 4), /* was instance id */
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VMSTATE_UNUSED(4), /* Was mmio_base. */
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VMSTATE_UINT32(rxbuf_size, E1000State),
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VMSTATE_UINT32(rxbuf_min_shift, E1000State),
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VMSTATE_UINT32(eecd_state.val_in, E1000State),
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VMSTATE_UINT16(eecd_state.bitnum_in, E1000State),
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VMSTATE_UINT16(eecd_state.bitnum_out, E1000State),
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VMSTATE_UINT16(eecd_state.reading, E1000State),
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VMSTATE_UINT32(eecd_state.old_eecd, E1000State),
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VMSTATE_UINT8(tx.ipcss, E1000State),
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VMSTATE_UINT8(tx.ipcso, E1000State),
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VMSTATE_UINT16(tx.ipcse, E1000State),
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VMSTATE_UINT8(tx.tucss, E1000State),
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VMSTATE_UINT8(tx.tucso, E1000State),
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VMSTATE_UINT16(tx.tucse, E1000State),
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VMSTATE_UINT32(tx.paylen, E1000State),
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VMSTATE_UINT8(tx.hdr_len, E1000State),
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VMSTATE_UINT16(tx.mss, E1000State),
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VMSTATE_UINT16(tx.size, E1000State),
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VMSTATE_UINT16(tx.tso_frames, E1000State),
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VMSTATE_UINT8(tx.sum_needed, E1000State),
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VMSTATE_INT8(tx.ip, E1000State),
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VMSTATE_INT8(tx.tcp, E1000State),
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VMSTATE_BUFFER(tx.header, E1000State),
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VMSTATE_BUFFER(tx.data, E1000State),
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VMSTATE_UINT16_ARRAY(eeprom_data, E1000State, 64),
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VMSTATE_UINT16_ARRAY(phy_reg, E1000State, 0x20),
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VMSTATE_UINT32(mac_reg[CTRL], E1000State),
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VMSTATE_UINT32(mac_reg[EECD], E1000State),
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VMSTATE_UINT32(mac_reg[EERD], E1000State),
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VMSTATE_UINT32(mac_reg[GPRC], E1000State),
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VMSTATE_UINT32(mac_reg[GPTC], E1000State),
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VMSTATE_UINT32(mac_reg[ICR], E1000State),
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VMSTATE_UINT32(mac_reg[ICS], E1000State),
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VMSTATE_UINT32(mac_reg[IMC], E1000State),
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VMSTATE_UINT32(mac_reg[IMS], E1000State),
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VMSTATE_UINT32(mac_reg[LEDCTL], E1000State),
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VMSTATE_UINT32(mac_reg[MANC], E1000State),
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VMSTATE_UINT32(mac_reg[MDIC], E1000State),
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VMSTATE_UINT32(mac_reg[MPC], E1000State),
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VMSTATE_UINT32(mac_reg[PBA], E1000State),
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VMSTATE_UINT32(mac_reg[RCTL], E1000State),
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VMSTATE_UINT32(mac_reg[RDBAH], E1000State),
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VMSTATE_UINT32(mac_reg[RDBAL], E1000State),
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VMSTATE_UINT32(mac_reg[RDH], E1000State),
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VMSTATE_UINT32(mac_reg[RDLEN], E1000State),
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VMSTATE_UINT32(mac_reg[RDT], E1000State),
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VMSTATE_UINT32(mac_reg[STATUS], E1000State),
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VMSTATE_UINT32(mac_reg[SWSM], E1000State),
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VMSTATE_UINT32(mac_reg[TCTL], E1000State),
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VMSTATE_UINT32(mac_reg[TDBAH], E1000State),
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VMSTATE_UINT32(mac_reg[TDBAL], E1000State),
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VMSTATE_UINT32(mac_reg[TDH], E1000State),
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VMSTATE_UINT32(mac_reg[TDLEN], E1000State),
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VMSTATE_UINT32(mac_reg[TDT], E1000State),
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VMSTATE_UINT32(mac_reg[TORH], E1000State),
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VMSTATE_UINT32(mac_reg[TORL], E1000State),
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VMSTATE_UINT32(mac_reg[TOTH], E1000State),
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VMSTATE_UINT32(mac_reg[TOTL], E1000State),
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VMSTATE_UINT32(mac_reg[TPR], E1000State),
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VMSTATE_UINT32(mac_reg[TPT], E1000State),
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VMSTATE_UINT32(mac_reg[TXDCTL], E1000State),
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VMSTATE_UINT32(mac_reg[WUFC], E1000State),
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VMSTATE_UINT32(mac_reg[VET], E1000State),
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VMSTATE_UINT32_SUB_ARRAY(mac_reg, E1000State, RA, 32),
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VMSTATE_UINT32_SUB_ARRAY(mac_reg, E1000State, MTA, 128),
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VMSTATE_UINT32_SUB_ARRAY(mac_reg, E1000State, VFTA, 128),
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VMSTATE_END_OF_LIST()
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}
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};
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static const uint16_t e1000_eeprom_template[64] = {
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0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0x0000, 0x0000, 0x0000,
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@ -1127,7 +1046,7 @@ pci_e1000_uninit(PCIDevice *dev)
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cpu_unregister_io_memory(d->mmio_index);
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qemu_del_vlan_client(d->vc);
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unregister_savevm("e1000", d);
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vmstate_unregister(&vmstate_e1000, d);
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return 0;
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}
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@ -1148,7 +1067,6 @@ static int pci_e1000_init(PCIDevice *pci_dev)
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E1000State *d = DO_UPCAST(E1000State, dev, pci_dev);
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uint8_t *pci_conf;
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uint16_t checksum = 0;
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static const char info_str[] = "e1000";
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int i;
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uint8_t *macaddr;
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@ -1193,7 +1111,7 @@ static int pci_e1000_init(PCIDevice *pci_dev)
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qemu_format_nic_info_str(d->vc, macaddr);
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register_savevm(info_str, -1, 2, nic_save, nic_load, d);
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vmstate_register(-1, &vmstate_e1000, d);
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e1000_reset(d);
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#if 0 /* rom bev support is broken -> can't load unconditionally */
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