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hw/hppa: Sync hppa_hardware.h file with SeaBIOS sources

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The hppa_hardware.h file is shared with SeaBIOS. Sync it.

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Helge Deller <deller@gmx.de>
This commit is contained in:
Helge Deller 2020-07-26 11:24:30 +02:00
parent 3461487523
commit e3a99a8a62
2 changed files with 6 additions and 2 deletions
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6
hw/hppa/hppa_hardware.h
View File

@ -17,6 +17,7 @@
#define LASI_UART_HPA 0xffd05000 #define LASI_UART_HPA 0xffd05000
#define LASI_SCSI_HPA 0xffd06000 #define LASI_SCSI_HPA 0xffd06000
#define LASI_LAN_HPA 0xffd07000 #define LASI_LAN_HPA 0xffd07000
#define LASI_RTC_HPA 0xffd09000
#define LASI_LPT_HPA 0xffd02000 #define LASI_LPT_HPA 0xffd02000
#define LASI_AUDIO_HPA 0xffd04000 #define LASI_AUDIO_HPA 0xffd04000
#define LASI_PS2KBD_HPA 0xffd08000 #define LASI_PS2KBD_HPA 0xffd08000
@ -37,10 +38,15 @@
#define PORT_PCI_CMD (PCI_HPA + DINO_PCI_ADDR) #define PORT_PCI_CMD (PCI_HPA + DINO_PCI_ADDR)
#define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA)
/* QEMU fw_cfg interface port */
#define QEMU_FW_CFG_IO_BASE (MEMORY_HPA + 0x80)
#define PORT_SERIAL1 (DINO_UART_HPA + 0x800) #define PORT_SERIAL1 (DINO_UART_HPA + 0x800)
#define PORT_SERIAL2 (LASI_UART_HPA + 0x800) #define PORT_SERIAL2 (LASI_UART_HPA + 0x800)
#define HPPA_MAX_CPUS 8 /* max. number of SMP CPUs */ #define HPPA_MAX_CPUS 8 /* max. number of SMP CPUs */
#define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */ #define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */
#define CPU_HPA_CR_REG 7 /* store CPU HPA in cr7 (SeaBIOS internal) */
#endif #endif

2
hw/hppa/lasi.c
View File

@ -54,8 +54,6 @@
#define LASI_CHIP(obj) \ #define LASI_CHIP(obj) \
OBJECT_CHECK(LasiState, (obj), TYPE_LASI_CHIP) OBJECT_CHECK(LasiState, (obj), TYPE_LASI_CHIP)
#define LASI_RTC_HPA (LASI_HPA + 0x9000)
typedef struct LasiState { typedef struct LasiState {
PCIHostState parent_obj; PCIHostState parent_obj;