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x86: Fix x86_64 'g' packet response to gdb from 32-bit mode.

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The remote protocol can't handle flipping back and forth
between 32-bit and 64-bit regs. To compensate, pretend "as if"
on 64-bit cpu when in 32-bit mode.

Signed-off-by: Doug Evans <dje@google.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <001a113dca8274572005406e03c3@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Doug Evans 2016-11-03 23:35:32 +00:00 committed by Paolo Bonzini
parent feddd2fd91
commit e3592bc9d8
1 changed files with 39 additions and 13 deletions
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52
target/i386/gdbstub.c
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@ -44,10 +44,22 @@ int x86_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
X86CPU *cpu = X86_CPU(cs); X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env; CPUX86State *env = &cpu->env;
/* N.B. GDB can't deal with changes in registers or sizes in the middle
of a session. So if we're in 32-bit mode on a 64-bit cpu, still act
as if we're on a 64-bit cpu. */
if (n < CPU_NB_REGS) { if (n < CPU_NB_REGS) {
if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { if (TARGET_LONG_BITS == 64) {
return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]); if (env->hflags & HF_CS64_MASK) {
} else if (n < CPU_NB_REGS32) { return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]);
} else if (n < CPU_NB_REGS32) {
return gdb_get_reg64(mem_buf,
env->regs[gpr_map[n]] & 0xffffffffUL);
} else {
memset(mem_buf, 0, sizeof(target_ulong));
return sizeof(target_ulong);
}
} else {
return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]); return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]);
} }
} else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
@ -60,8 +72,7 @@ int x86_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
return 10; return 10;
} else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
n -= IDX_XMM_REGS; n -= IDX_XMM_REGS;
if (n < CPU_NB_REGS32 || if (n < CPU_NB_REGS32 || TARGET_LONG_BITS == 64) {
(TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
stq_p(mem_buf, env->xmm_regs[n].ZMM_Q(0)); stq_p(mem_buf, env->xmm_regs[n].ZMM_Q(0));
stq_p(mem_buf + 8, env->xmm_regs[n].ZMM_Q(1)); stq_p(mem_buf + 8, env->xmm_regs[n].ZMM_Q(1));
return 16; return 16;
@ -69,8 +80,12 @@ int x86_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
} else { } else {
switch (n) { switch (n) {
case IDX_IP_REG: case IDX_IP_REG:
if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { if (TARGET_LONG_BITS == 64) {
return gdb_get_reg64(mem_buf, env->eip); if (env->hflags & HF_CS64_MASK) {
return gdb_get_reg64(mem_buf, env->eip);
} else {
return gdb_get_reg64(mem_buf, env->eip & 0xffffffffUL);
}
} else { } else {
return gdb_get_reg32(mem_buf, env->eip); return gdb_get_reg32(mem_buf, env->eip);
} }
@ -151,9 +166,17 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
CPUX86State *env = &cpu->env; CPUX86State *env = &cpu->env;
uint32_t tmp; uint32_t tmp;
/* N.B. GDB can't deal with changes in registers or sizes in the middle
of a session. So if we're in 32-bit mode on a 64-bit cpu, still act
as if we're on a 64-bit cpu. */
if (n < CPU_NB_REGS) { if (n < CPU_NB_REGS) {
if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { if (TARGET_LONG_BITS == 64) {
env->regs[gpr_map[n]] = ldtul_p(mem_buf); if (env->hflags & HF_CS64_MASK) {
env->regs[gpr_map[n]] = ldtul_p(mem_buf);
} else if (n < CPU_NB_REGS32) {
env->regs[gpr_map[n]] = ldtul_p(mem_buf) & 0xffffffffUL;
}
return sizeof(target_ulong); return sizeof(target_ulong);
} else if (n < CPU_NB_REGS32) { } else if (n < CPU_NB_REGS32) {
n = gpr_map32[n]; n = gpr_map32[n];
@ -169,8 +192,7 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
return 10; return 10;
} else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
n -= IDX_XMM_REGS; n -= IDX_XMM_REGS;
if (n < CPU_NB_REGS32 || if (n < CPU_NB_REGS32 || TARGET_LONG_BITS == 64) {
(TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
env->xmm_regs[n].ZMM_Q(0) = ldq_p(mem_buf); env->xmm_regs[n].ZMM_Q(0) = ldq_p(mem_buf);
env->xmm_regs[n].ZMM_Q(1) = ldq_p(mem_buf + 8); env->xmm_regs[n].ZMM_Q(1) = ldq_p(mem_buf + 8);
return 16; return 16;
@ -178,8 +200,12 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
} else { } else {
switch (n) { switch (n) {
case IDX_IP_REG: case IDX_IP_REG:
if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { if (TARGET_LONG_BITS == 64) {
env->eip = ldq_p(mem_buf); if (env->hflags & HF_CS64_MASK) {
env->eip = ldq_p(mem_buf);
} else {
env->eip = ldq_p(mem_buf) & 0xffffffffUL;
}
return 8; return 8;
} else { } else {
env->eip &= ~0xffffffffUL; env->eip &= ~0xffffffffUL;