diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 8d5141497f..1d24b85746 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7341,6 +7341,14 @@ static int times_16(DisasContext *ctx, int x) # define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B) #endif +#define REQUIRE_VECTOR(CTX) \ + do { \ + if (unlikely(!(CTX)->altivec_enabled)) { \ + gen_exception((CTX), POWERPC_EXCP_VPU); \ + return true; \ + } \ + } while (0) + /* * Helpers for implementing sets of trans_* functions. * Defer the implementation of NAME to FUNC, with optional extra arguments. diff --git a/target/ppc/translate/vector-impl.c.inc b/target/ppc/translate/vector-impl.c.inc index 117ce9b137..197e903337 100644 --- a/target/ppc/translate/vector-impl.c.inc +++ b/target/ppc/translate/vector-impl.c.inc @@ -17,20 +17,12 @@ * License along with this library; if not, see . */ -#define REQUIRE_ALTIVEC(CTX) \ - do { \ - if (unlikely(!(CTX)->altivec_enabled)) { \ - gen_exception((CTX), POWERPC_EXCP_VPU); \ - return true; \ - } \ - } while (0) - static bool trans_VCFUGED(DisasContext *ctx, arg_VX *a) { TCGv_i64 tgt, src, mask; REQUIRE_INSNS_FLAGS2(ctx, ISA310); - REQUIRE_ALTIVEC(ctx); + REQUIRE_VECTOR(ctx); tgt = tcg_temp_new_i64(); src = tcg_temp_new_i64();