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hw/arm/bcm2835_peripherals: Improve logging

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Various logging improvements as once:
- Use 0x prefix for hex numbers
- Display value written during write accesses
- Move some logs from GUEST_ERROR to UNIMP

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
Message-id: 20190926173428.10713-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2019-09-26 19:34:10 +02:00 committed by Peter Maydell
parent 2aee410712
commit e1ecf8c802
5 changed files with 25 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
hw/char/bcm2835_aux.c
View File

@ -162,8 +162,9 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
switch (offset) { switch (offset) {
case AUX_ENABLES: case AUX_ENABLES:
if (value != 1) { if (value != 1) {
qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI " qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI"
"or disable UART\n", __func__); " or disable UART: 0x%"PRIx64"\n",
__func__, value);
} }
break; break;

8
hw/dma/bcm2835_dma.c
View File

@ -180,7 +180,7 @@ static uint64_t bcm2835_dma_read(BCM2835DMAState *s, hwaddr offset,
res = ch->debug; res = ch->debug;
break; break;
default: default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset); __func__, offset);
break; break;
} }
@ -228,7 +228,7 @@ static void bcm2835_dma_write(BCM2835DMAState *s, hwaddr offset,
ch->debug = value; ch->debug = value;
break; break;
default: default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset); __func__, offset);
break; break;
} }
@ -247,7 +247,7 @@ static uint64_t bcm2835_dma0_read(void *opaque, hwaddr offset, unsigned size)
case BCM2708_DMA_ENABLE: case BCM2708_DMA_ENABLE:
return s->enable; return s->enable;
default: default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset); __func__, offset);
return 0; return 0;
} }
@ -274,7 +274,7 @@ static void bcm2835_dma0_write(void *opaque, hwaddr offset, uint64_t value,
s->enable = (value & 0xffff); s->enable = (value & 0xffff);
break; break;
default: default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset); __func__, offset);
} }
} }

7
hw/intc/bcm2836_control.c
View File

@ -264,7 +264,7 @@ static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size)
} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) { } else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2]; return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2];
} else { } else {
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
__func__, offset); __func__, offset);
return 0; return 0;
} }
@ -293,8 +293,9 @@ static void bcm2836_control_write(void *opaque, hwaddr offset,
} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) { } else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val; s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val;
} else { } else {
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
__func__, offset); " value 0x%"PRIx64"\n",
__func__, offset, val);
return; return;
} }

7
hw/misc/bcm2835_mbox.c
View File

@ -176,7 +176,7 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
break; break;
default: default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
__func__, offset); __func__, offset);
return 0; return 0;
} }
@ -228,8 +228,9 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
break; break;
default: default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
__func__, offset); " value 0x%"PRIx64"\n",
__func__, offset, value);
return; return;
} }

16
hw/misc/bcm2835_property.c
View File

@ -56,7 +56,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break; break;
case 0x00010001: /* Get board model */ case 0x00010001: /* Get board model */
qemu_log_mask(LOG_UNIMP, qemu_log_mask(LOG_UNIMP,
"bcm2835_property: %x get board model NYI\n", tag); "bcm2835_property: 0x%08x get board model NYI\n",
tag);
resplen = 4; resplen = 4;
break; break;
case 0x00010002: /* Get board revision */ case 0x00010002: /* Get board revision */
@ -69,7 +70,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break; break;
case 0x00010004: /* Get board serial */ case 0x00010004: /* Get board serial */
qemu_log_mask(LOG_UNIMP, qemu_log_mask(LOG_UNIMP,
"bcm2835_property: %x get board serial NYI\n", tag); "bcm2835_property: 0x%08x get board serial NYI\n",
tag);
resplen = 8; resplen = 8;
break; break;
case 0x00010005: /* Get ARM memory */ case 0x00010005: /* Get ARM memory */
@ -104,7 +106,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
case 0x00038001: /* Set clock state */ case 0x00038001: /* Set clock state */
qemu_log_mask(LOG_UNIMP, qemu_log_mask(LOG_UNIMP,
"bcm2835_property: %x set clock state NYI\n", tag); "bcm2835_property: 0x%08x set clock state NYI\n",
tag);
resplen = 8; resplen = 8;
break; break;
@ -129,7 +132,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
case 0x00038004: /* Set max clock rate */ case 0x00038004: /* Set max clock rate */
case 0x00038007: /* Set min clock rate */ case 0x00038007: /* Set min clock rate */
qemu_log_mask(LOG_UNIMP, qemu_log_mask(LOG_UNIMP,
"bcm2835_property: %x set clock rates NYI\n", tag); "bcm2835_property: 0x%08x set clock rate NYI\n",
tag);
resplen = 8; resplen = 8;
break; break;
@ -274,8 +278,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break; break;
default: default:
qemu_log_mask(LOG_GUEST_ERROR, qemu_log_mask(LOG_UNIMP,
"bcm2835_property: unhandled tag %08x\n", tag); "bcm2835_property: unhandled tag 0x%08x\n", tag);
break; break;
} }