hw/arm/bcm2835_peripherals: Improve logging
Various logging improvements as once: - Use 0x prefix for hex numbers - Display value written during write accesses - Move some logs from GUEST_ERROR to UNIMP Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Cleber Rosa <crosa@redhat.com> Message-id: 20190926173428.10713-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -163,7 +163,8 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
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case AUX_ENABLES:
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case AUX_ENABLES:
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if (value != 1) {
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if (value != 1) {
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qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI"
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qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI"
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"or disable UART\n", __func__);
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" or disable UART: 0x%"PRIx64"\n",
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__func__, value);
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}
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}
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break;
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break;
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@ -180,7 +180,7 @@ static uint64_t bcm2835_dma_read(BCM2835DMAState *s, hwaddr offset,
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res = ch->debug;
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res = ch->debug;
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break;
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break;
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default:
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
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__func__, offset);
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__func__, offset);
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break;
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break;
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}
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}
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@ -228,7 +228,7 @@ static void bcm2835_dma_write(BCM2835DMAState *s, hwaddr offset,
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ch->debug = value;
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ch->debug = value;
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break;
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break;
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default:
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
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__func__, offset);
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__func__, offset);
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break;
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break;
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}
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}
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@ -247,7 +247,7 @@ static uint64_t bcm2835_dma0_read(void *opaque, hwaddr offset, unsigned size)
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case BCM2708_DMA_ENABLE:
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case BCM2708_DMA_ENABLE:
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return s->enable;
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return s->enable;
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default:
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
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__func__, offset);
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__func__, offset);
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return 0;
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return 0;
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}
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}
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@ -274,7 +274,7 @@ static void bcm2835_dma0_write(void *opaque, hwaddr offset, uint64_t value,
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s->enable = (value & 0xffff);
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s->enable = (value & 0xffff);
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break;
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break;
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default:
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
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__func__, offset);
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__func__, offset);
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}
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}
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}
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}
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@ -264,7 +264,7 @@ static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size)
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} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
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} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
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return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2];
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return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2];
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} else {
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} else {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
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__func__, offset);
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__func__, offset);
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return 0;
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return 0;
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}
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}
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@ -293,8 +293,9 @@ static void bcm2836_control_write(void *opaque, hwaddr offset,
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} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
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} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
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s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val;
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s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val;
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} else {
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} else {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
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__func__, offset);
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" value 0x%"PRIx64"\n",
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__func__, offset, val);
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return;
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return;
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}
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}
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@ -176,7 +176,7 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
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break;
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break;
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default:
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
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__func__, offset);
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__func__, offset);
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return 0;
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return 0;
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}
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}
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@ -228,8 +228,9 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
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break;
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break;
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default:
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
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__func__, offset);
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" value 0x%"PRIx64"\n",
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__func__, offset, value);
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return;
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return;
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}
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}
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@ -56,7 +56,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
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break;
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break;
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case 0x00010001: /* Get board model */
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case 0x00010001: /* Get board model */
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qemu_log_mask(LOG_UNIMP,
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_property: %x get board model NYI\n", tag);
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"bcm2835_property: 0x%08x get board model NYI\n",
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tag);
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resplen = 4;
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resplen = 4;
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break;
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break;
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case 0x00010002: /* Get board revision */
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case 0x00010002: /* Get board revision */
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@ -69,7 +70,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
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break;
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break;
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case 0x00010004: /* Get board serial */
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case 0x00010004: /* Get board serial */
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qemu_log_mask(LOG_UNIMP,
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_property: %x get board serial NYI\n", tag);
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"bcm2835_property: 0x%08x get board serial NYI\n",
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tag);
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resplen = 8;
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resplen = 8;
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break;
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break;
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case 0x00010005: /* Get ARM memory */
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case 0x00010005: /* Get ARM memory */
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@ -104,7 +106,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
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case 0x00038001: /* Set clock state */
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case 0x00038001: /* Set clock state */
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qemu_log_mask(LOG_UNIMP,
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_property: %x set clock state NYI\n", tag);
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"bcm2835_property: 0x%08x set clock state NYI\n",
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tag);
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resplen = 8;
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resplen = 8;
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break;
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break;
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@ -129,7 +132,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
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case 0x00038004: /* Set max clock rate */
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case 0x00038004: /* Set max clock rate */
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case 0x00038007: /* Set min clock rate */
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case 0x00038007: /* Set min clock rate */
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qemu_log_mask(LOG_UNIMP,
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_property: %x set clock rates NYI\n", tag);
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"bcm2835_property: 0x%08x set clock rate NYI\n",
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tag);
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resplen = 8;
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resplen = 8;
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break;
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break;
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@ -274,8 +278,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
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break;
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break;
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default:
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_property: unhandled tag %08x\n", tag);
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"bcm2835_property: unhandled tag 0x%08x\n", tag);
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break;
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break;
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}
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}
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