target-tilegx: Handle conditional branch instructions
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -1089,30 +1089,55 @@ static TileExcp gen_branch_opcode_x1(DisasContext *dc, unsigned ext,
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target_ulong tgt = dc->pc + off * TILEGX_BUNDLE_SIZE_IN_BYTES;
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const char *mnemonic;
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switch (ext) {
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case BEQZT_BRANCH_OPCODE_X1:
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dc->jmp.dest = tcg_const_tl(tgt);
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dc->jmp.val1 = tcg_temp_new();
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tcg_gen_mov_tl(dc->jmp.val1, load_gr(dc, srca));
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/* Note that the "predict taken" opcodes have bit 0 clear.
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Therefore, fold the two cases together by setting bit 0. */
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switch (ext | 1) {
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case BEQZ_BRANCH_OPCODE_X1:
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case BNEZT_BRANCH_OPCODE_X1:
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dc->jmp.cond = TCG_COND_EQ;
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mnemonic = "beqz";
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break;
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case BNEZ_BRANCH_OPCODE_X1:
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case BLBC_BRANCH_OPCODE_X1:
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case BGEZT_BRANCH_OPCODE_X1:
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dc->jmp.cond = TCG_COND_NE;
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mnemonic = "bnez";
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break;
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case BGEZ_BRANCH_OPCODE_X1:
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case BGTZT_BRANCH_OPCODE_X1:
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dc->jmp.cond = TCG_COND_GE;
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mnemonic = "bgez";
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break;
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case BGTZ_BRANCH_OPCODE_X1:
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case BLBCT_BRANCH_OPCODE_X1:
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case BLBST_BRANCH_OPCODE_X1:
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case BLBS_BRANCH_OPCODE_X1:
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case BLEZT_BRANCH_OPCODE_X1:
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dc->jmp.cond = TCG_COND_GT;
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mnemonic = "bgtz";
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break;
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case BLEZ_BRANCH_OPCODE_X1:
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case BLTZT_BRANCH_OPCODE_X1:
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dc->jmp.cond = TCG_COND_LE;
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mnemonic = "blez";
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break;
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case BLTZ_BRANCH_OPCODE_X1:
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dc->jmp.cond = TCG_COND_LT;
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mnemonic = "bltz";
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break;
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case BLBC_BRANCH_OPCODE_X1:
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dc->jmp.cond = TCG_COND_EQ;
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tcg_gen_andi_tl(dc->jmp.val1, dc->jmp.val1, 1);
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mnemonic = "blbc";
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break;
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case BLBS_BRANCH_OPCODE_X1:
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dc->jmp.cond = TCG_COND_NE;
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tcg_gen_andi_tl(dc->jmp.val1, dc->jmp.val1, 1);
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mnemonic = "blbs";
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break;
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default:
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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}
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
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qemu_log("%s %s, " TARGET_FMT_lx " <%s>",
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mnemonic, reg_names[srca], tgt, lookup_symbol(tgt));
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qemu_log("%s%s %s, " TARGET_FMT_lx " <%s>",
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mnemonic, ext & 1 ? "" : "t",
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reg_names[srca], tgt, lookup_symbol(tgt));
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}
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return TILEGX_EXCP_NONE;
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}
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