From e027e1f075afe36698ce55d86f01b7817707c8b6 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Tue, 18 Jan 2011 00:12:22 +0100 Subject: [PATCH] mips: Expire late timers when reading cp0_count When reading cp0_count from a timer with a late trigger that should already have expired, expire it and raise the timer irq. This makes it possible for guest code (e.g, Linux) that first read cp0_count, then compare it with cp0_compare and check for raised timer interrupt lines to run reliably. Acked-by: Aurelien Jarno Signed-off-by: Edgar E. Iglesias --- hw/mips_timer.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/hw/mips_timer.c b/hw/mips_timer.c index 8c32087541..9c95f282a2 100644 --- a/hw/mips_timer.c +++ b/hw/mips_timer.c @@ -69,9 +69,17 @@ uint32_t cpu_mips_get_count (CPUState *env) if (env->CP0_Cause & (1 << CP0Ca_DC)) { return env->CP0_Count; } else { + uint64_t now; + + now = qemu_get_clock(vm_clock); + if (qemu_timer_pending(env->timer) + && qemu_timer_expired(env->timer, now)) { + /* The timer has already expired. */ + cpu_mips_timer_expire(env); + } + return env->CP0_Count + - (uint32_t)muldiv64(qemu_get_clock(vm_clock), - TIMER_FREQ, get_ticks_per_sec()); + (uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec()); } }