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tcg/mips: inline bswap16/bswap32 ops

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Use an inline version for the bswap16 and bswap32 ops to avoid
testing for MIPS32R2 instructions availability, as these ops are
only available in that case.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2013-08-28 13:51:40 +02:00
parent 988902fc3b
commit df81ff51d5
1 changed files with 3 additions and 4 deletions
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7
tcg/mips/tcg-target.c
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@ -1506,13 +1506,12 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
} }
break; break;
/* The bswap routines do not work on non-R2 CPU. In that case
we let TCG generating the corresponding code. */
case INDEX_op_bswap16_i32: case INDEX_op_bswap16_i32:
tcg_out_bswap16(s, args[0], args[1]); tcg_out_opc_reg(s, OPC_WSBH, args[0], 0, args[1]);
break; break;
case INDEX_op_bswap32_i32: case INDEX_op_bswap32_i32:
tcg_out_bswap32(s, args[0], args[1]); tcg_out_opc_reg(s, OPC_WSBH, args[0], 0, args[1]);
tcg_out_opc_sa(s, OPC_ROTR, args[0], args[0], 16);
break; break;
case INDEX_op_ext8s_i32: case INDEX_op_ext8s_i32: