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hw/intc: Rework Loongson LIOINTC 

As suggested by Philippe Mathieu-Daudé, rework Loongson's liointc:
1, Move macro definitions to loongson_liointc.h;
2, Remove magic values and use macros instead;
3, Replace dead D() code by trace events.

Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Huacai Chen <chenhuacai@kernel.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201221110538.3186646-2-chenhuacai@kernel.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Huacai Chen 2020-12-21 19:05:34 +08:00 committed by Philippe Mathieu-Daudé
parent b7cd9c1e84
commit dea9633232
2 changed files with 38 additions and 20 deletions
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36
hw/intc/loongson_liointc.c
View File

@ -1,6 +1,7 @@
/*
* QEMU Loongson Local I/O interrupt controler.
*
* Copyright (c) 2020 Huacai Chen <chenhc@lemote.com>
* Copyright (c) 2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
*
* This program is free software: you can redistribute it and/or modify
@ -19,13 +20,11 @@
*/
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "qemu/module.h"
#include "qemu/log.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "qom/object.h"
#define D(x)
#include "hw/intc/loongson_liointc.h"
#define NUM_IRQS 32
@ -40,13 +39,10 @@
#define R_IEN 0x24
#define R_IEN_SET 0x28
#define R_IEN_CLR 0x2c
#define R_PERCORE_ISR(x) (0x40 + 0x8 * x)
#define R_ISR_SIZE 0x8
#define R_START 0x40
#define R_END 0x64
#define TYPE_LOONGSON_LIOINTC "loongson.liointc"
DECLARE_INSTANCE_CHECKER(struct loongson_liointc, LOONGSON_LIOINTC,
TYPE_LOONGSON_LIOINTC)
struct loongson_liointc {
SysBusDevice parent_obj;
@ -123,14 +119,13 @@ liointc_read(void *opaque, hwaddr addr, unsigned int size)
goto out;
}
/* Rest is 4 byte */
/* Rest are 4 bytes */
if (size != 4 || (addr % 4)) {
goto out;
}
if (addr >= R_PERCORE_ISR(0) &&
addr < R_PERCORE_ISR(NUM_CORES)) {
int core = (addr - R_PERCORE_ISR(0)) / 8;
if (addr >= R_START && addr < R_END) {
int core = (addr - R_START) / R_ISR_SIZE;
r = p->per_core_isr[core];
goto out;
}
@ -147,7 +142,8 @@ liointc_read(void *opaque, hwaddr addr, unsigned int size)
}
out:
D(qemu_log("%s: size=%d addr=%lx val=%x\n", __func__, size, addr, r));
qemu_log_mask(CPU_LOG_INT, "%s: size=%d, addr=%"HWADDR_PRIx", val=%x\n",
__func__, size, addr, r);
return r;
}
@ -158,7 +154,8 @@ liointc_write(void *opaque, hwaddr addr,
struct loongson_liointc *p = opaque;
uint32_t value = val64;
D(qemu_log("%s: size=%d, addr=%lx val=%x\n", __func__, size, addr, value));
qemu_log_mask(CPU_LOG_INT, "%s: size=%d, addr=%"HWADDR_PRIx", val=%x\n",
__func__, size, addr, value);
/* Mapper is 1 byte */
if (size == 1 && addr < R_MAPPER_END) {
@ -166,14 +163,13 @@ liointc_write(void *opaque, hwaddr addr,
goto out;
}
/* Rest is 4 byte */
/* Rest are 4 bytes */
if (size != 4 || (addr % 4)) {
goto out;
}
if (addr >= R_PERCORE_ISR(0) &&
addr < R_PERCORE_ISR(NUM_CORES)) {
int core = (addr - R_PERCORE_ISR(0)) / 8;
if (addr >= R_START && addr < R_END) {
int core = (addr - R_START) / R_ISR_SIZE;
p->per_core_isr[core] = value;
goto out;
}
@ -224,7 +220,7 @@ static void loongson_liointc_init(Object *obj)
}
memory_region_init_io(&p->mmio, obj, &pic_ops, p,
"loongson.liointc", R_END);
TYPE_LOONGSON_LIOINTC, R_END);
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &p->mmio);
}

22
include/hw/intc/loongson_liointc.h Normal file
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@ -0,0 +1,22 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2020 Huacai Chen <chenhc@lemote.com>
* Copyright (c) 2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
*
*/
#ifndef LOONGSON_LIOINTC_H
#define LOONGSON_LIOINTC_H
#include "qemu/units.h"
#include "hw/sysbus.h"
#include "qom/object.h"
#define TYPE_LOONGSON_LIOINTC "loongson.liointc"
DECLARE_INSTANCE_CHECKER(struct loongson_liointc, LOONGSON_LIOINTC,
TYPE_LOONGSON_LIOINTC)
#endif /* LOONGSON_LIOINTC_H */