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target/arm: Restrict translation disabled alignment check to VMSA

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For cpus using PMSA, when the MPU is disabled, the default memory
type is Normal, Non-cachable. This means that it should not
have alignment restrictions enforced.

Cc: qemu-stable@nongnu.org
Fixes: 59754f85ed ("target/arm: Do memory type alignment check when translation disabled")
Reported-by: Clément Chigot <chigot@adacore.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Clément Chigot <chigot@adacore.com>
Message-id: 20240422170722.117409-1-richard.henderson@linaro.org
[PMM: trivial comment, commit message tweaks]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 7b19a3554d)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
Richard Henderson 2024-04-22 10:07:22 -07:00 committed by Michael Tokarev
parent f90bf4c154
commit dde9f0f0b7
1 changed files with 10 additions and 2 deletions
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12
target/arm/tcg/hflags.c
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@ -38,8 +38,16 @@ static bool aprofile_require_alignment(CPUARMState *env, int el, uint64_t sctlr)
}
/*
* If translation is disabled, then the default memory type is
* Device(-nGnRnE) instead of Normal, which requires that alignment
* With PMSA, when the MPU is disabled, all memory types in the
* default map are Normal, so don't need aligment enforcing.
*/
if (arm_feature(env, ARM_FEATURE_PMSA)) {
return false;
}
/*
* With VMSA, if translation is disabled, then the default memory type
* is Device(-nGnRnE) instead of Normal, which requires that alignment
* be enforced. Since this affects all ram, it is most efficient
* to handle this during translation.
*/