linux-headers: update
Update to commit b1da3acc781c ("Merge tag 'ecryptfs-5.6-rc3-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tyhicks/ecryptfs") Signed-off-by: Cornelia Huck <cohuck@redhat.com>
This commit is contained in:
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@ -409,6 +409,30 @@ extern "C" {
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#define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4)
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#define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4)
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#define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5)
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#define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5)
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/*
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* Intel color control surfaces (CCS) for Gen-12 render compression.
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*
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* The main surface is Y-tiled and at plane index 0, the CCS is linear and
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* at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
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* main surface. In other words, 4 bits in CCS map to a main surface cache
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* line pair. The main surface pitch is required to be a multiple of four
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* Y-tile widths.
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*/
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#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6)
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/*
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* Intel color control surfaces (CCS) for Gen-12 media compression
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*
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* The main surface is Y-tiled and at plane index 0, the CCS is linear and
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* at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
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* main surface. In other words, 4 bits in CCS map to a main surface cache
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* line pair. The main surface pitch is required to be a multiple of four
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* Y-tile widths. For semi-planar formats like NV12, CCS planes follow the
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* Y and UV planes i.e., planes 0 and 1 are used for Y and UV surfaces,
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* planes 2 and 3 for the respective CCS.
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*/
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#define I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7)
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/*
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/*
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* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
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* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
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*
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*
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@ -593,6 +593,9 @@ struct ethtool_pauseparam {
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* @ETH_SS_RSS_HASH_FUNCS: RSS hush function names
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* @ETH_SS_RSS_HASH_FUNCS: RSS hush function names
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* @ETH_SS_PHY_STATS: Statistic names, for use with %ETHTOOL_GPHYSTATS
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* @ETH_SS_PHY_STATS: Statistic names, for use with %ETHTOOL_GPHYSTATS
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* @ETH_SS_PHY_TUNABLES: PHY tunable names
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* @ETH_SS_PHY_TUNABLES: PHY tunable names
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* @ETH_SS_LINK_MODES: link mode names
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* @ETH_SS_MSG_CLASSES: debug message class names
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* @ETH_SS_WOL_MODES: wake-on-lan modes
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*/
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*/
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enum ethtool_stringset {
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enum ethtool_stringset {
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ETH_SS_TEST = 0,
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ETH_SS_TEST = 0,
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@ -604,6 +607,12 @@ enum ethtool_stringset {
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ETH_SS_TUNABLES,
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ETH_SS_TUNABLES,
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ETH_SS_PHY_STATS,
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ETH_SS_PHY_STATS,
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ETH_SS_PHY_TUNABLES,
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ETH_SS_PHY_TUNABLES,
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ETH_SS_LINK_MODES,
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ETH_SS_MSG_CLASSES,
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ETH_SS_WOL_MODES,
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/* add new constants above here */
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ETH_SS_COUNT
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};
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};
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/**
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/**
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@ -1688,6 +1697,8 @@ static inline int ethtool_validate_duplex(uint8_t duplex)
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#define WAKE_MAGICSECURE (1 << 6) /* only meaningful if WAKE_MAGIC */
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#define WAKE_MAGICSECURE (1 << 6) /* only meaningful if WAKE_MAGIC */
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#define WAKE_FILTER (1 << 7)
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#define WAKE_FILTER (1 << 7)
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#define WOL_MODE_COUNT 8
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/* L2-L4 network traffic flow types */
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/* L2-L4 network traffic flow types */
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#define TCP_V4_FLOW 0x01 /* hash or spec (tcp_ip4_spec) */
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#define TCP_V4_FLOW 0x01 /* hash or spec (tcp_ip4_spec) */
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#define UDP_V4_FLOW 0x02 /* hash or spec (udp_ip4_spec) */
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#define UDP_V4_FLOW 0x02 /* hash or spec (udp_ip4_spec) */
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@ -31,6 +31,7 @@ struct input_event {
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unsigned long __sec;
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unsigned long __sec;
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#if defined(__sparc__) && defined(__arch64__)
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#if defined(__sparc__) && defined(__arch64__)
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unsigned int __usec;
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unsigned int __usec;
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unsigned int __pad;
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#else
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#else
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unsigned long __usec;
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unsigned long __usec;
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#endif
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#endif
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@ -676,6 +676,7 @@
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#define PCI_EXP_LNKCTL2_TLS_32_0GT 0x0005 /* Supported Speed 32GT/s */
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#define PCI_EXP_LNKCTL2_TLS_32_0GT 0x0005 /* Supported Speed 32GT/s */
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#define PCI_EXP_LNKCTL2_ENTER_COMP 0x0010 /* Enter Compliance */
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#define PCI_EXP_LNKCTL2_ENTER_COMP 0x0010 /* Enter Compliance */
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#define PCI_EXP_LNKCTL2_TX_MARGIN 0x0380 /* Transmit Margin */
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#define PCI_EXP_LNKCTL2_TX_MARGIN 0x0380 /* Transmit Margin */
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#define PCI_EXP_LNKCTL2_HASD 0x0020 /* HW Autonomous Speed Disable */
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#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */
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#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */
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#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52 /* v2 endpoints with link end here */
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#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52 /* v2 endpoints with link end here */
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#define PCI_EXP_SLTCAP2 52 /* Slot Capabilities 2 */
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#define PCI_EXP_SLTCAP2 52 /* Slot Capabilities 2 */
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@ -390,5 +390,7 @@
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#define __NR_fspick (__NR_SYSCALL_BASE + 433)
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#define __NR_fspick (__NR_SYSCALL_BASE + 433)
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#define __NR_pidfd_open (__NR_SYSCALL_BASE + 434)
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#define __NR_pidfd_open (__NR_SYSCALL_BASE + 434)
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#define __NR_clone3 (__NR_SYSCALL_BASE + 435)
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#define __NR_clone3 (__NR_SYSCALL_BASE + 435)
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#define __NR_openat2 (__NR_SYSCALL_BASE + 437)
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#define __NR_pidfd_getfd (__NR_SYSCALL_BASE + 438)
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#endif /* _ASM_ARM_UNISTD_COMMON_H */
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#endif /* _ASM_ARM_UNISTD_COMMON_H */
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@ -220,10 +220,18 @@ struct kvm_vcpu_events {
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#define KVM_REG_ARM_PTIMER_CVAL ARM64_SYS_REG(3, 3, 14, 2, 2)
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#define KVM_REG_ARM_PTIMER_CVAL ARM64_SYS_REG(3, 3, 14, 2, 2)
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#define KVM_REG_ARM_PTIMER_CNT ARM64_SYS_REG(3, 3, 14, 0, 1)
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#define KVM_REG_ARM_PTIMER_CNT ARM64_SYS_REG(3, 3, 14, 0, 1)
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/* EL0 Virtual Timer Registers */
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/*
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* EL0 Virtual Timer Registers
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*
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* WARNING:
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* KVM_REG_ARM_TIMER_CVAL and KVM_REG_ARM_TIMER_CNT are not defined
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* with the appropriate register encodings. Their values have been
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* accidentally swapped. As this is set API, the definitions here
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* must be used, rather than ones derived from the encodings.
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*/
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#define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1)
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#define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1)
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#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2)
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#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2)
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#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2)
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#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2)
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/* KVM-as-firmware specific pseudo-registers */
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/* KVM-as-firmware specific pseudo-registers */
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#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT)
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#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT)
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@ -19,5 +19,6 @@
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#define __ARCH_WANT_NEW_STAT
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#define __ARCH_WANT_NEW_STAT
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#define __ARCH_WANT_SET_GET_RLIMIT
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#define __ARCH_WANT_SET_GET_RLIMIT
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#define __ARCH_WANT_TIME32_SYSCALLS
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#define __ARCH_WANT_TIME32_SYSCALLS
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#define __ARCH_WANT_SYS_CLONE3
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#include <asm-generic/unistd.h>
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#include <asm-generic/unistd.h>
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@ -11,6 +11,8 @@
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#define PROT_WRITE 0x2 /* page can be written */
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#define PROT_WRITE 0x2 /* page can be written */
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#define PROT_EXEC 0x4 /* page can be executed */
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#define PROT_EXEC 0x4 /* page can be executed */
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#define PROT_SEM 0x8 /* page may be used for atomic ops */
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#define PROT_SEM 0x8 /* page may be used for atomic ops */
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/* 0x10 reserved for arch-specific use */
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/* 0x20 reserved for arch-specific use */
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#define PROT_NONE 0x0 /* page can not be accessed */
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#define PROT_NONE 0x0 /* page can not be accessed */
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#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
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#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
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#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
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#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
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@ -851,8 +851,13 @@ __SYSCALL(__NR_pidfd_open, sys_pidfd_open)
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__SYSCALL(__NR_clone3, sys_clone3)
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__SYSCALL(__NR_clone3, sys_clone3)
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#endif
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#endif
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#define __NR_openat2 437
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__SYSCALL(__NR_openat2, sys_openat2)
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#define __NR_pidfd_getfd 438
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__SYSCALL(__NR_pidfd_getfd, sys_pidfd_getfd)
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#undef __NR_syscalls
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#undef __NR_syscalls
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#define __NR_syscalls 436
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#define __NR_syscalls 439
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/*
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/*
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* 32 bit systems traditionally used different
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* 32 bit systems traditionally used different
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#define __NR_fspick (__NR_Linux + 433)
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#define __NR_fspick (__NR_Linux + 433)
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#define __NR_pidfd_open (__NR_Linux + 434)
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#define __NR_pidfd_open (__NR_Linux + 434)
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#define __NR_clone3 (__NR_Linux + 435)
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#define __NR_clone3 (__NR_Linux + 435)
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#define __NR_openat2 (__NR_Linux + 437)
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#define __NR_pidfd_getfd (__NR_Linux + 438)
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#endif /* _ASM_MIPS_UNISTD_N32_H */
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#endif /* _ASM_MIPS_UNISTD_N32_H */
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#define __NR_fspick (__NR_Linux + 433)
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#define __NR_fspick (__NR_Linux + 433)
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#define __NR_pidfd_open (__NR_Linux + 434)
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#define __NR_pidfd_open (__NR_Linux + 434)
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#define __NR_clone3 (__NR_Linux + 435)
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#define __NR_clone3 (__NR_Linux + 435)
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#define __NR_openat2 (__NR_Linux + 437)
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#define __NR_pidfd_getfd (__NR_Linux + 438)
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#endif /* _ASM_MIPS_UNISTD_N64_H */
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#endif /* _ASM_MIPS_UNISTD_N64_H */
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#define __NR_fspick (__NR_Linux + 433)
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#define __NR_fspick (__NR_Linux + 433)
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#define __NR_pidfd_open (__NR_Linux + 434)
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#define __NR_pidfd_open (__NR_Linux + 434)
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#define __NR_clone3 (__NR_Linux + 435)
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#define __NR_clone3 (__NR_Linux + 435)
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#define __NR_openat2 (__NR_Linux + 437)
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#define __NR_pidfd_getfd (__NR_Linux + 438)
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#endif /* _ASM_MIPS_UNISTD_O32_H */
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#endif /* _ASM_MIPS_UNISTD_O32_H */
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@ -418,6 +418,8 @@
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#define __NR_fspick 433
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#define __NR_fspick 433
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#define __NR_pidfd_open 434
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#define __NR_pidfd_open 434
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#define __NR_clone3 435
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#define __NR_clone3 435
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#define __NR_openat2 437
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#define __NR_pidfd_getfd 438
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#endif /* _ASM_POWERPC_UNISTD_32_H */
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#endif /* _ASM_POWERPC_UNISTD_32_H */
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#define __NR_fspick 433
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#define __NR_fspick 433
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#define __NR_pidfd_open 434
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#define __NR_pidfd_open 434
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#define __NR_clone3 435
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#define __NR_clone3 435
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#define __NR_openat2 437
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#define __NR_pidfd_getfd 438
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#endif /* _ASM_POWERPC_UNISTD_64_H */
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#endif /* _ASM_POWERPC_UNISTD_64_H */
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#define __NR_fspick 433
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#define __NR_fspick 433
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#define __NR_pidfd_open 434
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#define __NR_pidfd_open 434
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#define __NR_clone3 435
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#define __NR_clone3 435
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#define __NR_openat2 437
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#define __NR_pidfd_getfd 438
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#endif /* _ASM_S390_UNISTD_32_H */
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#endif /* _ASM_S390_UNISTD_32_H */
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#define __NR_fspick 433
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#define __NR_fspick 433
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#define __NR_pidfd_open 434
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#define __NR_pidfd_open 434
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#define __NR_clone3 435
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#define __NR_clone3 435
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#define __NR_openat2 437
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#define __NR_pidfd_getfd 438
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#endif /* _ASM_S390_UNISTD_64_H */
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#endif /* _ASM_S390_UNISTD_64_H */
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#define __NR_fspick 433
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#define __NR_fspick 433
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#define __NR_pidfd_open 434
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#define __NR_pidfd_open 434
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#define __NR_clone3 435
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#define __NR_clone3 435
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#define __NR_openat2 437
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#define __NR_pidfd_getfd 438
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#endif /* _ASM_X86_UNISTD_32_H */
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#endif /* _ASM_X86_UNISTD_32_H */
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#define __NR_fspick 433
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#define __NR_fspick 433
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#define __NR_pidfd_open 434
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#define __NR_pidfd_open 434
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#define __NR_clone3 435
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#define __NR_clone3 435
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#define __NR_openat2 437
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#define __NR_pidfd_getfd 438
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#endif /* _ASM_X86_UNISTD_64_H */
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#endif /* _ASM_X86_UNISTD_64_H */
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#define __NR_fspick (__X32_SYSCALL_BIT + 433)
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#define __NR_fspick (__X32_SYSCALL_BIT + 433)
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#define __NR_pidfd_open (__X32_SYSCALL_BIT + 434)
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#define __NR_pidfd_open (__X32_SYSCALL_BIT + 434)
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#define __NR_clone3 (__X32_SYSCALL_BIT + 435)
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#define __NR_clone3 (__X32_SYSCALL_BIT + 435)
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#define __NR_openat2 (__X32_SYSCALL_BIT + 437)
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#define __NR_pidfd_getfd (__X32_SYSCALL_BIT + 438)
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#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
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#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
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#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
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#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
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#define __NR_ioctl (__X32_SYSCALL_BIT + 514)
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#define __NR_ioctl (__X32_SYSCALL_BIT + 514)
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#define KVM_CAP_PPC_GUEST_DEBUG_SSTEP 176
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#define KVM_CAP_PPC_GUEST_DEBUG_SSTEP 176
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#define KVM_CAP_ARM_NISV_TO_USER 177
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#define KVM_CAP_ARM_NISV_TO_USER 177
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#define KVM_CAP_ARM_INJECT_EXT_DABT 178
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#define KVM_CAP_ARM_INJECT_EXT_DABT 178
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#define KVM_CAP_S390_VCPU_RESETS 179
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#ifdef KVM_CAP_IRQ_ROUTING
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#ifdef KVM_CAP_IRQ_ROUTING
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@ -1473,6 +1474,10 @@ struct kvm_enc_region {
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/* Available with KVM_CAP_ARM_SVE */
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/* Available with KVM_CAP_ARM_SVE */
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#define KVM_ARM_VCPU_FINALIZE _IOW(KVMIO, 0xc2, int)
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#define KVM_ARM_VCPU_FINALIZE _IOW(KVMIO, 0xc2, int)
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/* Available with KVM_CAP_S390_VCPU_RESETS */
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#define KVM_S390_NORMAL_RESET _IO(KVMIO, 0xc3)
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#define KVM_S390_CLEAR_RESET _IO(KVMIO, 0xc4)
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/* Secure Encrypted Virtualization command */
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/* Secure Encrypted Virtualization command */
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enum sev_cmd_id {
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enum sev_cmd_id {
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/* Guest initialization commands */
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/* Guest initialization commands */
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