From dda97e385b2f0fa84267a497596fe79898d48123 Mon Sep 17 00:00:00 2001 From: Alex Richardson Date: Fri, 3 Jul 2020 17:15:15 +0100 Subject: [PATCH] target/mips: Fix ADD.S FPU instruction MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After merging latest QEMU upstream into our CHERI fork, I noticed that some of the FPU tests in our MIPS baremetal testsuite [*] started failing. It turns out commit 1ace099f2a accidentally changed add.s into a subtract. [*] https://github.com/CTSRD-CHERI/cheritest Fixes: 1ace099f2a ("target/mips: fpu: Demacro ADD.") Signed-off-by: Alex Richardson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200703161515.25966-1-Alexander.Richardson@cl.cam.ac.uk> Signed-off-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé --- target/mips/fpu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c index 7a3a61cab3..56beda49d8 100644 --- a/target/mips/fpu_helper.c +++ b/target/mips/fpu_helper.c @@ -1221,7 +1221,7 @@ uint32_t helper_float_add_s(CPUMIPSState *env, { uint32_t wt2; - wt2 = float32_sub(fst0, fst1, &env->active_fpu.fp_status); + wt2 = float32_add(fst0, fst1, &env->active_fpu.fp_status); update_fcr31(env, GETPC()); return wt2; }