target/loongarch: Add constant timer support

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-25-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Xiaojuan Yang 2022-06-06 20:43:14 +08:00 committed by Richard Henderson
parent f757a2cd69
commit dd615fa48d
5 changed files with 77 additions and 0 deletions

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@ -0,0 +1,64 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* QEMU LoongArch constant timer support
*
* Copyright (c) 2021 Loongson Technology Corporation Limited
*/
#include "qemu/osdep.h"
#include "qemu/timer.h"
#include "cpu.h"
#include "internals.h"
#include "cpu-csr.h"
#define TIMER_PERIOD 10 /* 10 ns period for 100 MHz frequency */
#define CONSTANT_TIMER_TICK_MASK 0xfffffffffffcUL
#define CONSTANT_TIMER_ENABLE 0x1UL
uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu)
{
return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / TIMER_PERIOD;
}
uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu)
{
uint64_t now, expire;
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
expire = timer_expire_time_ns(&cpu->timer);
return (expire - now) / TIMER_PERIOD;
}
void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,
uint64_t value)
{
CPULoongArchState *env = &cpu->env;
uint64_t now, next;
env->CSR_TCFG = value;
if (value & CONSTANT_TIMER_ENABLE) {
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
next = now + (value & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD;
timer_mod(&cpu->timer, next);
} else {
timer_del(&cpu->timer);
}
}
void loongarch_constant_timer_cb(void *opaque)
{
LoongArchCPU *cpu = opaque;
CPULoongArchState *env = &cpu->env;
uint64_t now, next;
if (FIELD_EX64(env->CSR_TCFG, CSR_TCFG, PERIODIC)) {
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
next = now + (env->CSR_TCFG & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD;
timer_mod(&cpu->timer, next);
} else {
env->CSR_TCFG = FIELD_DP64(env->CSR_TCFG, CSR_TCFG, EN, 0);
}
loongarch_cpu_set_irq(opaque, IRQ_TIMER, 1);
}

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@ -495,6 +495,8 @@ static void loongarch_cpu_init(Object *obj)
cpu_set_cpustate_pointers(cpu);
qdev_init_gpio_in(DEVICE(cpu), loongarch_cpu_set_irq, N_IRQS);
timer_init_ns(&cpu->timer, QEMU_CLOCK_VIRTUAL,
&loongarch_constant_timer_cb, cpu);
}
static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model)

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@ -11,6 +11,7 @@
#include "exec/cpu-defs.h"
#include "fpu/softfloat-types.h"
#include "hw/registerfields.h"
#include "qemu/timer.h"
#define TCG_GUEST_DEFAULT_MO (0)
@ -185,6 +186,8 @@ extern const char * const regnames[32];
extern const char * const fregnames[32];
#define N_IRQS 13
#define IRQ_TIMER 11
#define IRQ_IPI 12
#define LOONGARCH_STLB 2048 /* 2048 STLB */
#define LOONGARCH_MTLB 64 /* 64 MTLB */
@ -295,6 +298,7 @@ struct ArchCPU {
CPUNegativeOffsetState neg;
CPULoongArchState env;
QEMUTimer timer;
};
#define TYPE_LOONGARCH_CPU "loongarch-cpu"

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@ -32,6 +32,12 @@ extern const VMStateDescription vmstate_loongarch_cpu;
void loongarch_cpu_set_irq(void *opaque, int irq, int level);
void loongarch_constant_timer_cb(void *opaque);
uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu);
uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu);
void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,
uint64_t value);
bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);

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@ -18,6 +18,7 @@ loongarch_softmmu_ss = ss.source_set()
loongarch_softmmu_ss.add(files(
'machine.c',
'tlb_helper.c',
'constant_timer.c',
))
loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])