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hw/arm: Introduce BCM2838 SoC

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Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240226000259.2752893-5-sergey.kambalin@auriga.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Sergey Kambalin 2024-02-25 18:02:22 -06:00 committed by Peter Maydell
parent 08df067636
commit dcf1d8cdfb
5 changed files with 237 additions and 0 deletions
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98
hw/arm/bcm2838.c Normal file
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@ -0,0 +1,98 @@
/*
* BCM2838 SoC emulation
*
* Copyright (C) 2022 Ovchinnikov Vitalii <vitalii.ovchinnikov@auriga.com>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/module.h"
#include "hw/arm/raspi_platform.h"
#include "hw/sysbus.h"
#include "hw/arm/bcm2838.h"
#include "trace.h"
#define VIRTUAL_PMU_IRQ 7
static void bcm2838_init(Object *obj)
{
BCM2838State *s = BCM2838(obj);
object_initialize_child(obj, "peripherals", &s->peripherals,
TYPE_BCM2838_PERIPHERALS);
object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
"board-rev");
object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
"vcram-size");
object_property_add_alias(obj, "command-line", OBJECT(&s->peripherals),
"command-line");
}
static void bcm2838_realize(DeviceState *dev, Error **errp)
{
int n;
BCM2838State *s = BCM2838(dev);
BCM283XBaseState *s_base = BCM283X_BASE(dev);
BCM283XBaseClass *bc_base = BCM283X_BASE_GET_CLASS(dev);
BCM2838PeripheralState *ps = BCM2838_PERIPHERALS(&s->peripherals);
BCMSocPeripheralBaseState *ps_base =
BCM_SOC_PERIPHERALS_BASE(&s->peripherals);
if (!bcm283x_common_realize(dev, ps_base, errp)) {
return;
}
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(ps), 1, BCM2838_PERI_LOW_BASE, 1);
/* bcm2836 interrupt controller (and mailboxes, etc.) */
if (!sysbus_realize(SYS_BUS_DEVICE(&s_base->control), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s_base->control), 0, bc_base->ctrl_base);
/* Create cores */
for (n = 0; n < bc_base->core_count; n++) {
object_property_set_int(OBJECT(&s_base->cpu[n].core), "mp-affinity",
(bc_base->clusterid << 8) | n, &error_abort);
/* start powered off if not enabled */
object_property_set_bool(OBJECT(&s_base->cpu[n].core),
"start-powered-off",
n >= s_base->enabled_cpus, &error_abort);
if (!qdev_realize(DEVICE(&s_base->cpu[n].core), NULL, errp)) {
return;
}
}
}
static void bcm2838_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
BCM283XBaseClass *bc_base = BCM283X_BASE_CLASS(oc);
bc_base->cpu_type = ARM_CPU_TYPE_NAME("cortex-a72");
bc_base->core_count = BCM283X_NCPUS;
bc_base->peri_base = 0xfe000000;
bc_base->ctrl_base = 0xff800000;
bc_base->clusterid = 0x0;
dc->realize = bcm2838_realize;
}
static const TypeInfo bcm2838_type = {
.name = TYPE_BCM2838,
.parent = TYPE_BCM283X_BASE,
.instance_size = sizeof(BCM2838State),
.instance_init = bcm2838_init,
.class_size = sizeof(BCM283XBaseClass),
.class_init = bcm2838_class_init,
};
static void bcm2838_register_types(void)
{
type_register_static(&bcm2838_type);
}
type_init(bcm2838_register_types);

72
hw/arm/bcm2838_peripherals.c Normal file
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@ -0,0 +1,72 @@
/*
* BCM2838 peripherals emulation
*
* Copyright (C) 2022 Ovchinnikov Vitalii <vitalii.ovchinnikov@auriga.com>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/module.h"
#include "hw/arm/raspi_platform.h"
#include "hw/arm/bcm2838_peripherals.h"
/* Lower peripheral base address on the VC (GPU) system bus */
#define BCM2838_VC_PERI_LOW_BASE 0x7c000000
static void bcm2838_peripherals_init(Object *obj)
{
BCM2838PeripheralState *s = BCM2838_PERIPHERALS(obj);
BCM2838PeripheralClass *bc = BCM2838_PERIPHERALS_GET_CLASS(obj);
/* Lower memory region for peripheral devices (exported to the Soc) */
memory_region_init(&s->peri_low_mr, obj, "bcm2838-peripherals",
bc->peri_low_size);
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_low_mr);
}
static void bcm2838_peripherals_realize(DeviceState *dev, Error **errp)
{
BCM2838PeripheralState *s = BCM2838_PERIPHERALS(dev);
BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(dev);
bcm_soc_peripherals_common_realize(dev, errp);
/* Map lower peripherals into the GPU address space */
memory_region_init_alias(&s->peri_low_mr_alias, OBJECT(s),
"bcm2838-peripherals", &s->peri_low_mr, 0,
memory_region_size(&s->peri_low_mr));
memory_region_add_subregion_overlap(&s_base->gpu_bus_mr,
BCM2838_VC_PERI_LOW_BASE,
&s->peri_low_mr_alias, 1);
}
static void bcm2838_peripherals_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
BCM2838PeripheralClass *bc = BCM2838_PERIPHERALS_CLASS(oc);
BCMSocPeripheralBaseClass *bc_base = BCM_SOC_PERIPHERALS_BASE_CLASS(oc);
bc->peri_low_size = 0x2000000;
bc_base->peri_size = 0x1800000;
dc->realize = bcm2838_peripherals_realize;
}
static const TypeInfo bcm2838_peripherals_type_info = {
.name = TYPE_BCM2838_PERIPHERALS,
.parent = TYPE_BCM_SOC_PERIPHERALS_BASE,
.instance_size = sizeof(BCM2838PeripheralState),
.instance_init = bcm2838_peripherals_init,
.class_size = sizeof(BCM2838PeripheralClass),
.class_init = bcm2838_peripherals_class_init,
};
static void bcm2838_peripherals_register_types(void)
{
type_register_static(&bcm2838_peripherals_type_info);
}
type_init(bcm2838_peripherals_register_types)

2
hw/arm/meson.build
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@ -30,6 +30,7 @@ arm_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c', 'cubi
arm_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', 'orangepi.c'))
arm_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40.c', 'bananapi_m2u.c'))
arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c'))
arm_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c'))
arm_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c'))
arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
arm_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
@ -67,6 +68,7 @@ system_ss.add(when: 'CONFIG_GUMSTIX', if_true: files('gumstix.c'))
system_ss.add(when: 'CONFIG_NETDUINO2', if_true: files('netduino2.c'))
system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap2.c'))
system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'))
system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2838_peripherals.c'))
system_ss.add(when: 'CONFIG_SPITZ', if_true: files('spitz.c'))
system_ss.add(when: 'CONFIG_STRONGARM', if_true: files('strongarm.c'))
system_ss.add(when: 'CONFIG_SX1', if_true: files('omap_sx1.c'))

29
include/hw/arm/bcm2838.h Normal file
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@ -0,0 +1,29 @@
/*
* BCM2838 SoC emulation
*
* Copyright (C) 2022 Ovchinnikov Vitalii <vitalii.ovchinnikov@auriga.com>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef BCM2838_H
#define BCM2838_H
#include "hw/arm/bcm2836.h"
#include "hw/arm/bcm2838_peripherals.h"
#define BCM2838_PERI_LOW_BASE 0xfc000000
#define BCM2838_GIC_BASE 0x40000
#define TYPE_BCM2838 "bcm2838"
OBJECT_DECLARE_TYPE(BCM2838State, BCM2838Class, BCM2838)
struct BCM2838State {
/*< private >*/
BCM283XBaseState parent_obj;
/*< public >*/
BCM2838PeripheralState peripherals;
};
#endif /* BCM2838_H */

36
include/hw/arm/bcm2838_peripherals.h Normal file
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/*
* BCM2838 peripherals emulation
*
* Copyright (C) 2022 Ovchinnikov Vitalii <vitalii.ovchinnikov@auriga.com>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef BCM2838_PERIPHERALS_H
#define BCM2838_PERIPHERALS_H
#include "hw/arm/bcm2835_peripherals.h"
#define TYPE_BCM2838_PERIPHERALS "bcm2838-peripherals"
OBJECT_DECLARE_TYPE(BCM2838PeripheralState, BCM2838PeripheralClass,
BCM2838_PERIPHERALS)
struct BCM2838PeripheralState {
/*< private >*/
BCMSocPeripheralBaseState parent_obj;
/*< public >*/
MemoryRegion peri_low_mr;
MemoryRegion peri_low_mr_alias;
MemoryRegion mphi_mr_alias;
};
struct BCM2838PeripheralClass {
/*< private >*/
BCMSocPeripheralBaseClass parent_class;
/*< public >*/
uint64_t peri_low_size; /* Peripheral lower range size */
};
#endif /* BCM2838_PERIPHERALS_H */