Merge remote-tracking branch 'rth/tcg-ia64-17' into staging

# By Richard Henderson
# Via Richard Henderson
* rth/tcg-ia64-17:
  tcg-ia64: Introduce tcg_opc_bswap64_i
  tcg-ia64: Introduce tcg_opc_ext_i
  tcg-ia64: Introduce tcg_opc_movi_a
  tcg-ia64: Introduce tcg_opc_mov_a
  tcg-ia64: Use A3 form of logical operations
  tcg-ia64: Use SUB_A3 and ADDS_A4 for subtraction
  tcg-ia64: Use ADDS for small addition
  tcg-ia64: Avoid unnecessary stop bit in tcg_out_alu
  tcg-ia64: Move AREG0 to R32
  tcg-ia64: Simplify brcond
  tcg-ia64: Handle constant calls
  tcg-ia64: Use shortcuts for nop insns
  tcg-ia64: Use TCGMemOp within qemu_ldst routines

Message-id: 1384811395-7097-1-git-send-email-rth@twiddle.net
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
This commit is contained in:
Anthony Liguori 2013-11-19 13:00:02 -08:00
commit dc6dc0a987
2 changed files with 399 additions and 364 deletions

File diff suppressed because it is too large Load Diff

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@ -92,6 +92,8 @@ typedef enum {
TCG_REG_R61,
TCG_REG_R62,
TCG_REG_R63,
TCG_AREG0 = TCG_REG_R32,
} TCGReg;
#define TCG_CT_CONST_ZERO 0x100
@ -162,8 +164,6 @@ typedef enum {
#define TCG_TARGET_HAS_not_i32 0 /* xor r1, -1, r3 */
#define TCG_TARGET_HAS_not_i64 0 /* xor r1, -1, r3 */
#define TCG_AREG0 TCG_REG_R7
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
start = start & ~(32UL - 1UL);